dm: exynos: dts: Use GPIO bank phandles for GPIOs
authorSimon Glass <sjg@chromium.org>
Tue, 6 Jan 2015 03:05:42 +0000 (20:05 -0700)
committerSimon Glass <sjg@chromium.org>
Fri, 30 Jan 2015 00:09:53 +0000 (17:09 -0700)
U-Boot now supports using GPIOs using bank phandles instead of global
numbers. Update the exynos device tree files to use this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
12 files changed:
arch/arm/dts/exynos4.dtsi
arch/arm/dts/exynos4210-origen.dts
arch/arm/dts/exynos4210-trats.dts
arch/arm/dts/exynos4210-universal_c210.dts
arch/arm/dts/exynos4412-odroid.dts
arch/arm/dts/exynos4412-trats2.dts
arch/arm/dts/exynos5.dtsi
arch/arm/dts/exynos5250-smdk5250.dts
arch/arm/dts/exynos5250-snow.dts
arch/arm/dts/exynos5420-peach-pit.dts
arch/arm/dts/exynos5422-odroidxu3.dts
arch/arm/dts/exynos5800-peach-pi.dts

index 77fad48..3c983ed 100644 (file)
                interrupts = <0 131 0>;
        };
 
-       gpio: gpio {
-               gpio-controller;
-               #gpio-cells = <2>;
-
-               interrupt-controller;
-               #interrupt-cells = <2>;
-       };
 };
index dd2476c..3f87761 100644 (file)
@@ -36,7 +36,7 @@
        sdhci@12530000 {
                samsung,bus-width = <4>;
                samsung,timing = <1 2 3>;
-               cd-gpios = <&gpio 0xA2 0>;
+               cd-gpios = <&gpk2 2 0>;
        };
 
        sdhci@12540000 {
index 8c7a2c3..36d02df 100644 (file)
        sdhci@12510000 {
                samsung,bus-width = <8>;
                samsung,timing = <1 3 3>;
-               pwr-gpios = <&gpio 146 0>;
+               pwr-gpios = <&gpk0 2 0>;
        };
 
        sdhci@12520000 {
        sdhci@12530000 {
                samsung,bus-width = <4>;
                samsung,timing = <1 2 3>;
-               cd-gpios = <&gpio 284 0>;
+               cd-gpios = <&gpx3 4 0>;
        };
 
        sdhci@12540000 {
index 808c3f7..16948c9 100644 (file)
@@ -24,7 +24,7 @@
        sdhci@12510000 {
                samsung,bus-width = <8>;
                samsung,timing = <1 3 3>;
-               pwr-gpios = <&gpio 146 0>;
+               pwr-gpios = <&gpk0 2 0>;
        };
 
        sdhci@12520000 {
@@ -34,7 +34,7 @@
        sdhci@12530000 {
                samsung,bus-width = <4>;
                samsung,timing = <1 2 3>;
-               cd-gpios = <&gpio 284 0>;
+               cd-gpios = <&gpx3 4 0>;
        };
 
        sdhci@12540000 {
 
        soft-spi {
                compatible = "u-boot,soft-spi";
-               cs-gpio = <&gpio 235 0>;        /* Y43 */
-               sclk-gpio = <&gpio 225 0>;      /* Y31 */
-               mosi-gpio = <&gpio 227 0>;      /* Y33 */
-               miso-gpio = <&gpio 224 0>;      /* Y30 */
+               cs-gpio = <&gpy4 3 0>;
+               sclk-gpio = <&gpy3 1 0>;
+               mosi-gpio = <&gpy3 3 0>;
+               miso-gpio = <&gpy3 0 0>;
                spi-delay-us = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
index c78efec..29ad6ab 100644 (file)
@@ -51,7 +51,7 @@
        sdhci@12530000 {
                samsung,bus-width = <4>;
                samsung,timing = <1 2 3>;
-               cd-gpios = <&gpio 122 0>;
+               cd-gpios = <&gpk2 2 0>;
        };
 
        sdhci@12540000 {
index 60e4515..dd238df 100644 (file)
        sdhci@12510000 {
                samsung,bus-width = <8>;
                samsung,timing = <1 3 3>;
-               pwr-gpios = <&gpio 0x6a 0>;
+               pwr-gpios = <&gpk0 4 0>;
                status = "disabled";
        };
 
        sdhci@12530000 {
                samsung,bus-width = <4>;
                samsung,timing = <1 2 3>;
-               cd-gpios = <&gpio 0x7a 0>;
+               cd-gpios = <&gpk2 2 0>;
        };
 
        sdhci@12540000 {
        dwmmc@12550000 {
                samsung,bus-width = <8>;
                samsung,timing = <2 1 0>;
-               pwr-gpios = <&gpio 0x6a 0>;
+               pwr-gpios = <&gpk0 4 0>;
                fifoth_val = <0x203f0040>;
                bus_hz = <400000000>;
                div = <0x3>;
index e539068..238acb8 100644 (file)
@@ -6,6 +6,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        compatible = "samsung,exynos5";
                u-boot,dm-pre-reloc;
                id = <3>;
        };
-
-       gpio: gpio {
-       };
 };
index 8850409..9273562 100644 (file)
        };
 
        ehci@12110000 {
-               samsung,vbus-gpio = <&gpio 0x316 0>; /* X26 */
+               samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
        };
 };
index bac5015..649e4bd 100644 (file)
@@ -44,7 +44,7 @@
                        reg = <0x1e>;
                        compatible = "google,cros-ec";
                        i2c-max-frequency = <100000>;
-                       ec-interrupt = <&gpio 182 1>;
+                       ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
                };
 
                power-regulator@48 {
@@ -68,7 +68,7 @@
                        reg = <0>;
                        compatible = "google,cros-ec";
                        spi-max-frequency = <5000000>;
-                       ec-interrupt = <&gpio 182 1>;
+                       ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
                        optimise-flash-write;
                        status = "disabled";
                };
@@ -76,7 +76,7 @@
 
        sound@3830000 {
                samsung,codec-type = "max98095";
-               codec-enable-gpio = <&gpio 0xb7 0>;
+               codec-enable-gpio = <&gpx1 7 GPIO_ACTIVE_HIGH>;
        };
 
        sound@12d60000 {
        };
 
        ehci@12110000 {
-               samsung,vbus-gpio = <&gpio 0xb1 0>; /* X11 */
+               samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
        };
 
        xhci@12000000 {
-               samsung,vbus-gpio = <&gpio 0xbf 0>; /* X27 */
+               samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
        };
 
        tmu@10060000 {
index d1d8735..b801de9 100644 (file)
@@ -17,7 +17,7 @@
                "google,peach", "samsung,exynos5420", "samsung,exynos5";
 
        config {
-               google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */
+               google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
                hwid = "PIT TEST A-A 7848";
                lazy-init = <1>;
        };
                        spi-half-duplex;
                        spi-max-timeout-ms = <1100>;
                        spi-frame-header = <0xec>;
-                       ec-interrupt = <&gpio 93 1>; /* GPX1_5 */
+                       ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
 
                        /*
                         * This describes the flash memory within the EC. Note
        };
 
        xhci@12000000 {
-               samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */
+               samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
        };
 
        xhci@12400000 {
-               samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */
+               samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
        };
 
        fimd@14400000 {
index 79a7acd..8f46637 100644 (file)
@@ -32,7 +32,7 @@
        };
 
        ehci@12110000 {
-               samsung,vbus-gpio = <&gpio 0x66 0>; /* X26 */
+               samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
        };
 
        serial@12C20000 {
index e7c380f..e4bc100 100644 (file)
@@ -17,7 +17,7 @@
                "google,peach", "samsung,exynos5800", "samsung,exynos5";
 
        config {
-               google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */
+               google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
                hwid = "PIT TEST A-A 7848";
                lazy-init = <1>;
        };
@@ -32,7 +32,7 @@
                mem-manuf = "samsung";
                mem-type = "ddr3";
                clock-frequency = <800000000>;
-               arm-frequency = <1700000000>;
+               arm-frequency = <900000000>;
        };
 
        tmu@10060000 {
                        spi-half-duplex;
                        spi-max-timeout-ms = <1100>;
                        spi-frame-header = <0xec>;
-                       ec-interrupt = <&gpio 93 1>; /* GPX1_5 */
+                       ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
 
                        /*
                         * This describes the flash memory within the EC. Note
        };
 
        xhci@12000000 {
-               samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */
+               samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
        };
 
        xhci@12400000 {
-               samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */
+               samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
        };
 
        fimd@14400000 {