arm.md (fixuns_truncsfsi2, [...]): New patterns.

	* config/arm/arm.md (fixuns_truncsfsi2, fixuns_truncdfsi2,
	floatunssisf2, floatunssidf2): New patterns.

From-SVN: r80831

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d7b78c3..bc284d5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-04-19  Paul Brook  <paul@codesourcery.com>
+
+       * config/arm/arm.md (fixuns_truncsfsi2, fixuns_truncdfsi2,
+       floatunssisf2, floatunssidf2): New patterns.
+
 2004-04-18  Mark Mitchell  <mark@codesourcery.com>
 
        PR other/14918

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index dd313a9..6f7e2a7 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -558,6 +558,26 @@
    (set_attr "type" "farith")]
 )
 
+
+(define_insn "fixuns_truncsfsi2"
+  [(set (match_operand:SI                0 "s_register_operand" "=w")
+       (unsigned_fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" "w"))))]
+  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+  "ftouizs%?\\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "farith")]
+)
+
+(define_insn "fixuns_truncdfsi2"
+  [(set (match_operand:SI                0 "s_register_operand" "=w")
+       (unsigned_fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" "w"))))]
+  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+  "ftouizd%?\\t%0, %P1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "farith")]
+)
+
+
 (define_insn "*floatsisf2_vfp"
   [(set (match_operand:SF          0 "s_register_operand" "=w")
        (float:SF (match_operand:SI 1 "s_register_operand" "w")))]
@@ -577,6 +597,25 @@
 )
 
 
+(define_insn "floatunssisf2"
+  [(set (match_operand:SF          0 "s_register_operand" "=w")
+       (unsigned_float:SF (match_operand:SI 1 "s_register_operand" "w")))]
+  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+  "fuitos%?\\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "farith")]
+)
+
+(define_insn "floatunssidf2"
+  [(set (match_operand:DF          0 "s_register_operand" "=w")
+       (unsigned_float:DF (match_operand:SI 1 "s_register_operand" "w")))]
+  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+  "fuitod%?\\t%P0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "farith")]
+)
+
+
 ;; Sqrt insns.
 
 (define_insn "*sqrtsf2_vfp"
@@ -740,5 +779,3 @@
 ;; fmdhr et al (VFPv1)
 ;; Support for xD (single precision only) variants.
 ;; fmrrs, fmsrr
-;; fuito*
-;; ftoui*