Convert CONFIG_FSL_CORENET to Kconfig

This converts the following to Kconfig:
   CONFIG_FSL_CORENET

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 12dc03cfd0f059e83243d4b2a974abd84cf5fb56..2ac6b872f7bd61525948d4a296c70f4900e6e344 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -154,6 +154,7 @@ config TARGET_P2041RDB
        bool "Support P2041RDB"
        select ARCH_P2041
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       select FSL_CORENET
        select PHYS_64BIT
        imply CMD_SATA
        imply FSL_SATA
@@ -233,6 +234,7 @@ config TARGET_KMP204X
 config TARGET_KMCENT2
        bool "Support kmcent2"
        select VENDOR_KM
+       select FSL_CORENET
 
 endchoice
 
@@ -240,6 +242,7 @@ config ARCH_B4420
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select HETROGENOUS_CLUSTERS
        select SYS_FSL_DDR_VER_47
@@ -268,6 +271,7 @@ config ARCH_B4860
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select HETROGENOUS_CLUSTERS
        select SYS_FSL_DDR_VER_47
@@ -607,6 +611,7 @@ config ARCH_P3041
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -638,6 +643,7 @@ config ARCH_P4080
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -678,6 +684,7 @@ config ARCH_P5040
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -710,6 +717,7 @@ config ARCH_T1024
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -735,6 +743,7 @@ config ARCH_T1040
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -760,6 +769,7 @@ config ARCH_T1042
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -784,6 +794,7 @@ config ARCH_T2080
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_47
@@ -814,6 +825,7 @@ config ARCH_T4240
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_47
@@ -1274,6 +1286,10 @@ config SYS_BOOK3E_HV
        bool "Category E.HV is supported"
        depends on BOOKE
 
+config FSL_CORENET
+       bool
+       select SYS_FSL_CPC
+
 config SYS_CPC_REINIT_F
        bool
        help
@@ -1281,7 +1297,7 @@ config SYS_CPC_REINIT_F
          required to be re-initialized.
 
 config SYS_FSL_CPC
-       bool "Corenet Platform Cache support"
+       bool
 
 config SYS_CACHE_STASHING
        bool "Enable cache stashing"

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 1dcbe0670b6256185e34f51a98f8b56a85ed1fec..169c91ca9e4f1bc8b0bc314cce3cdf3e7e661ed7 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -74,7 +74,6 @@
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM       2
 
 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_NUM_FMAN            1
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -91,7 +90,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P3041)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_NUM_FMAN            1
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -108,7 +106,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_NUM_FMAN            2
 #define CONFIG_SYS_NUM_FM1_DTSEC       4
@@ -126,7 +123,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 #elif defined(CONFIG_ARCH_P5040)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     3
 #define CONFIG_SYS_NUM_FMAN            2
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -160,7 +156,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.2"
 
 #elif defined(CONFIG_ARCH_T4240)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #ifdef CONFIG_ARCH_T4240
@@ -196,7 +191,6 @@
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_SRDS_2
@@ -231,7 +225,6 @@
 #endif
 
 #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
@@ -256,7 +249,6 @@
 #define QE_NUM_OF_SNUM                 28
 
 #elif defined(CONFIG_ARCH_T1024)
-#define CONFIG_FSL_CORENET          /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3  /* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLL      2
@@ -281,7 +273,6 @@
 #define QE_NUM_OF_SNUM                 28
 
 #elif defined(CONFIG_ARCH_T2080)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_QMAN_V3

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 1540e90a1ff3cc2d15c65de25ea73bf80c7cae2b..da15a1cdb56e5ee1455f239751b783789e87f9c1 100644 (file)
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index c1c249ddc17b9909d6dfbb36fe5469064f2b193c..96be038967d8428d48aa6f9be910fac6be3aafe8 100644 (file)
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 32761cd8990daa12d7f1beb73b07eb3b1f0b2a04..91f0ac56981b21828fe0798a275ca4415dfc42c1 100644 (file)
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 312396c8eacba16d5a571cd2208b5118debc909e..78398207e5bab4a661ec222b56a0e1a79cb211fd 100644 (file)
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index ea76795c38fb803a823763f80bdb4f50fcf3082e..dd399466728a47d6d761a32afd5f565367ff5a7d 100644 (file)
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index fa49232d341b7d5d7ea746f870ca50c64044c1b9..bff11680216aee0a20d5bddfb6fbed90faf0eabf 100644 (file)
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 145f3260a905afa5f5c6fea0deb3a222385625e9..a0b55b0bb95d721257ed747f2abeea1ceeaab5ed 100644 (file)
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 679887bd4e430d9d8894de90936ab980fa056b83..2eb1f7f951b317ca3baf0bf4ce0bc34a454a713f 100644 (file)
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index c9313ede668eb67c7e50150905e3ecd14ee5e2f5..35945812a7c8e8f407c3bfcc905afe0d4eb0bf4f 100644 (file)
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index ca85b0c45583756d01c9573551355255edb8b1a9..0d27e49c8ddbb861dd35996a42860dca82c77e64 100644 (file)
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 4f51df3645d5f4708079a3f77b527fd257dea72a..ef75108eb9771b88c56adbc1d806cff7f48f65b4 100644 (file)
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 0bc8fd995e9c6eb38c2af60e333fc0ec334e2507..cf2d5de9547ce29db2285247096c18dba7dbae4e 100644 (file)
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 412fcb22cba888e7fbb3f938d55d42ff2f349a45..81f04aecf22ab771f1f90e82f5ccaca8eab3cb55 100644 (file)
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 7a1a72fb5d8d69ca0569f7b634d915e32ba8056c..fd28f3d8c77538c855198ab9cf6ca09490ab7a06 100644 (file)
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index f808516fdb074d471fe5f7ad5992974cea57bf0d..5933485c65b11be3911327b70869bf0a945b5a38 100644 (file)
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 683a114551f249fe6c724b7ea66822166a52b6f0..1140bc0aecbfcaab12bc694bf703d4888694a10a 100644 (file)
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y

diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index d954574574b2db1c899629f741660794f950d82b..05c43311b1d863aebc6b0275a7918fec50bf8591 100644 (file)
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -15,7 +15,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 769de718508a0ba6b5e31035ab89ae2540cc5c38..8c82ee8afa22c7c0ab397b8f8296c4aa7e483a52 100644 (file)
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -17,7 +17,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index aaadb88ebdf4ea8c50d8e4a5d795e498ed1567e5..700bbd98af992f02f87e33731bb916b55bc92d68 100644 (file)
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 8f227294fd5141a35be0f3f5cbc1807f9ed90064..200536a7fb0d54702eb483f6d9771912e11404d5 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 7b502a9bc4e191bc40faf3f5a5a3136fb57dd695..281cc7169b9c5ca42d263dfae3e2e59a0bc2ba64 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 42659cd1287dfeb80948f06b9eac293571d6ce51..c7b337a668130ad7142e128ba4e8b49ac713d70d 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 48a734d0bac9c3f7d606aa54f8a98d9c6a715544..4983a522318350d919cf97f122fc17c21da14c43 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index dca3b3eb87ecb60643ae12acb3995e15e5be6a37..30669d88e84ced2a8d5df3a9b6a161b318808a35 100644 (file)
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 192f7b729de4fcfaf6d3fe676b331a8411691a47..17629f13498bd44012d894c0b2c10db26aaa2bb7 100644 (file)
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 0023ffc2af4fc8f766bf5c9d0e87b4df31b9c43c..4c62d9316d21544a962daa382807098e25835d33 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 81c8e3fc879630ae3db8a6b154be0c888264e468..f68c87411e7b19c3b34ea60325c6d3c41c034207 100644 (file)
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 16563ea8afce0a6464f3571f6e8ee483bd89f400..ef29f474c94fb6e28e56495aa866b36b993ae89c 100644 (file)
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index b106f0c1d334f89d094229330d1cfc9ac1e7ce7b..62263b2fd4da3707b374304c3b1dba96c212b982 100644 (file)
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 143b23015ebf3e212188933fd8ed0240608a10dd..a1db4a4bf8fa7943356b0b4227e13e118987903e 100644 (file)
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y

diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 488b7d28c924f1a737d77dbe85a484fbade2044c..6e9c7082222124453f6fa9a7221fbca9fee502f4 100644 (file)
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 3c11b130f5e4c4098868a81a42d6bc08c7f826d7..719f022e8b07181fb789bda11178e6b93bc99c3e 100644 (file)
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index b4ddc46cf8607dd9ca31e7ca66aa11f2272ef7e9..1117c015eeac692b12cca66399e05b001198add3 100644 (file)
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index 1f32cf4284aa17cedcb0031744b09c4f3bada7ba..10991e196469068d850e4c24b9212d4bc42f3d8d 100644 (file)
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y

diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 3aa70a24eaa54f4fffb2515c45b0f0d122a87b98..0aa715dcac363d2a678d4c4198333bf41a0e7139 100644 (file)
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y

diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 8f3f1f1c51d5739f11775edaa52fae922dd33e3e..07114a07c20bc3d88ded28552390d0bc8c2977e7 100644 (file)
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y

diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 25f001e77b8564a5b130eaa4042b067182b25a8d..99b9c7931772bd930fe41e4de6dff8b9d3029bf6 100644 (file)
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y

diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index f0d426866ae14ed2dd9d67f1044ab4ea597eba54..df3b5f3bc6fb617875cacbab0c036acc5d441983 100644 (file)
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 9c7a4b2c7c99ca5001683418aea2d05a2e230b5d..dc73dcdc1df648ce405c92d6b8a2d002045707bc 100644 (file)
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 08b174dd323ede7cfdc2973abc890345cf03ae03..dcc0b2987d1b0b1e9b9d04656acd7008631bdfbe 100644 (file)
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -12,7 +12,6 @@ CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y

diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 348133c2c70dd1d1bd04da7b836022e36e8a22f5..589ba615dd6ddbdd80fa58bc6fa6ac9cd38e34d0 100644 (file)
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -133,7 +133,6 @@
 #define KM_I2C_DEBLOCK_SDA     21
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 
 #define CONFIG_RESET_VECTOR_ADDRESS    0xebfffffc