freedreno: convert blit program to array for each number of rts
authorIlia Mirkin <imirkin@alum.mit.edu>
Wed, 1 Apr 2015 05:14:39 +0000 (01:14 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Thu, 2 Apr 2015 04:09:14 +0000 (00:09 -0400)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
12 files changed:
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
src/gallium/drivers/freedreno/a2xx/fd2_program.c
src/gallium/drivers/freedreno/a2xx/fd2_screen.c
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
src/gallium/drivers/freedreno/a3xx/fd3_screen.c
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
src/gallium/drivers/freedreno/a4xx/fd4_program.c
src/gallium/drivers/freedreno/a4xx/fd4_screen.c
src/gallium/drivers/freedreno/freedreno_context.h
src/gallium/drivers/freedreno/freedreno_program.c
src/gallium/drivers/freedreno/freedreno_screen.c
src/gallium/drivers/freedreno/freedreno_screen.h

index 8593c4a..982c9c2 100644 (file)
@@ -255,7 +255,7 @@ fd2_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
        OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
        OUT_RING(ring, 0x0000003b);
 
-       fd2_program_emit(ring, &ctx->blit_prog);
+       fd2_program_emit(ring, &ctx->blit_prog[0]);
 
        OUT_PKT0(ring, REG_A2XX_TC_CNTL_STATUS, 1);
        OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE);
index cb6281b..5ccfd58 100644 (file)
@@ -474,6 +474,6 @@ fd2_prog_init(struct pipe_context *pctx)
 
        ctx->solid_prog.fp = create_solid_fp();
        ctx->solid_prog.vp = create_solid_vp();
-       ctx->blit_prog.fp = create_blit_fp();
-       ctx->blit_prog.vp = create_blit_vp();
+       ctx->blit_prog[0].fp = create_blit_fp();
+       ctx->blit_prog[0].vp = create_blit_vp();
 }
index 1801d95..c2baa6f 100644 (file)
@@ -104,6 +104,7 @@ fd2_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd2_screen_init(struct pipe_screen *pscreen)
 {
+       fd_screen(pscreen)->max_rts = 1;
        pscreen->context_create = fd2_context_create;
        pscreen->is_format_supported = fd2_screen_is_format_supported;
 }
index 8ec28d9..304fc84 100644 (file)
@@ -467,7 +467,7 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
        enum pipe_format format = pipe_surface_format(pfb->cbufs[0]);
        struct fd3_emit emit = {
                        .vtx = &fd3_ctx->blit_vbuf_state,
-                       .prog = &ctx->blit_prog,
+                       .prog = &ctx->blit_prog[0],
                        .sprite_coord_enable = 1,
                        .key = {
                                .half_precision = fd3_half_precision(format),
index 5fc63e8..182db84 100644 (file)
@@ -103,6 +103,7 @@ fd3_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd3_screen_init(struct pipe_screen *pscreen)
 {
+       fd_screen(pscreen)->max_rts = 1;
        pscreen->context_create = fd3_context_create;
        pscreen->is_format_supported = fd3_screen_is_format_supported;
 }
index 2c57995..9a90506 100644 (file)
@@ -282,7 +282,7 @@ fd4_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
        struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
        struct fd4_emit emit = {
                        .vtx = &fd4_ctx->blit_vbuf_state,
-                       .prog = &ctx->blit_prog,
+                       .prog = &ctx->blit_prog[0],
                        .key = key,
                        .format = fd4_emit_format(pfb->cbufs[0]),
        };
index 9ee47fb..015f6c8 100644 (file)
@@ -497,7 +497,7 @@ static void
 fix_blit_fp(struct pipe_context *pctx)
 {
        struct fd_context *ctx = fd_context(pctx);
-       struct fd4_shader_stateobj *so = ctx->blit_prog.fp;
+       struct fd4_shader_stateobj *so = ctx->blit_prog[0].fp;
 
        so->shader->vpsrepl[0] = 0x99999999;
        so->shader->vpsrepl[1] = 0x99999999;
index cf697d4..f5b4668 100644 (file)
@@ -100,6 +100,7 @@ fd4_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd4_screen_init(struct pipe_screen *pscreen)
 {
+       fd_screen(pscreen)->max_rts = 1;
        pscreen->context_create = fd4_context_create;
        pscreen->is_format_supported = fd4_screen_is_format_supported;
 }
index 244d527..7b0424e 100644 (file)
@@ -176,7 +176,7 @@ struct fd_context {
        struct fd_program_stateobj solid_prog; // TODO move to screen?
 
        /* shaders used by mem->gmem blits: */
-       struct fd_program_stateobj blit_prog; // TODO move to screen?
+       struct fd_program_stateobj blit_prog[8]; // TODO move to screen?
 
        /* do we need to mem2gmem before rendering.  We don't, if for example,
         * there was a glClear() that invalidated the entire previous buffer
index 167ed02..52a165b 100644 (file)
@@ -27,6 +27,7 @@
  */
 
 #include "tgsi/tgsi_text.h"
+#include "tgsi/tgsi_ureg.h"
 
 #include "freedreno_program.h"
 #include "freedreno_context.h"
@@ -64,15 +65,6 @@ static const char *solid_vp =
        "  0: MOV OUT[0], IN[0]                      \n"
        "  1: END                                    \n";
 
-static const char *blit_fp =
-       "FRAG                                        \n"
-       "PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1       \n"
-       "DCL IN[0], TEXCOORD[0], PERSPECTIVE         \n"
-       "DCL OUT[0], COLOR                           \n"
-       "DCL SAMP[0]                                 \n"
-       "  0: TEX OUT[0], IN[0], SAMP[0], 2D         \n"
-       "  1: END                                    \n";
-
 static const char *blit_vp =
        "VERT                                        \n"
        "DCL IN[0]                                   \n"
@@ -99,9 +91,31 @@ static void * assemble_tgsi(struct pipe_context *pctx,
                return pctx->create_vs_state(pctx, &cso);
 }
 
+static void *
+fd_prog_blit(struct pipe_context *pctx, int rts)
+{
+       int i;
+       struct ureg_src tc;
+       struct ureg_program *ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
+       if (!ureg)
+               return NULL;
+
+       tc = ureg_DECL_fs_input(
+                       ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_PERSPECTIVE);
+       for (i = 0; i < rts; i++)
+               ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i),
+                                TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i));
+
+       ureg_END(ureg);
+
+       return ureg_create_shader_and_destroy(ureg, pctx);
+}
+
+
 void fd_prog_init(struct pipe_context *pctx)
 {
        struct fd_context *ctx = fd_context(pctx);
+       int i;
 
        pctx->bind_fs_state = fd_fp_state_bind;
        pctx->bind_vs_state = fd_vp_state_bind;
@@ -113,16 +127,22 @@ void fd_prog_init(struct pipe_context *pctx)
 
        ctx->solid_prog.fp = assemble_tgsi(pctx, solid_fp, true);
        ctx->solid_prog.vp = assemble_tgsi(pctx, solid_vp, false);
-       ctx->blit_prog.fp = assemble_tgsi(pctx, blit_fp, true);
-       ctx->blit_prog.vp = assemble_tgsi(pctx, blit_vp, false);
+       ctx->blit_prog[0].vp = assemble_tgsi(pctx, blit_vp, false);
+       ctx->blit_prog[0].fp = fd_prog_blit(pctx, 1);
+       for (i = 1; i < ctx->screen->max_rts; i++) {
+               ctx->blit_prog[i].vp = ctx->blit_prog[0].vp;
+               ctx->blit_prog[i].fp = fd_prog_blit(pctx, i + 1);
+       }
 }
 
 void fd_prog_fini(struct pipe_context *pctx)
 {
        struct fd_context *ctx = fd_context(pctx);
+       int i;
 
        pctx->delete_vs_state(pctx, ctx->solid_prog.vp);
        pctx->delete_fs_state(pctx, ctx->solid_prog.fp);
-       pctx->delete_vs_state(pctx, ctx->blit_prog.vp);
-       pctx->delete_fs_state(pctx, ctx->blit_prog.fp);
+       pctx->delete_vs_state(pctx, ctx->blit_prog[0].vp);
+       for (i = 0; i < ctx->screen->max_rts; i++)
+               pctx->delete_fs_state(pctx, ctx->blit_prog[i].fp);
 }
index bb48802..fe72444 100644 (file)
@@ -252,7 +252,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 
        /* Render targets. */
        case PIPE_CAP_MAX_RENDER_TARGETS:
-               return 1;
+               return screen->max_rts;
 
        /* Queries. */
        case PIPE_CAP_QUERY_TIME_ELAPSED:
index e1c554c..3b470d1 100644 (file)
@@ -46,6 +46,7 @@ struct fd_screen {
        uint32_t device_id;
        uint32_t gpu_id;         /* 220, 305, etc */
        uint32_t chip_id;        /* coreid:8 majorrev:8 minorrev:8 patch:8 */
+       uint32_t max_rts;
 
        struct fd_device *dev;
        struct fd_pipe *pipe;