AMDGPU: Don't assert on f16 inv2pi immediates pre-gfx8
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 22 Jul 2020 16:27:50 +0000 (12:27 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 22 Jul 2020 17:59:03 +0000 (13:59 -0400)
v_cvt_f32_f16 can still accept this value as a literal constant. This
showed up in GlobalISel since it doesn't have constant folding for
G_FPEXT.

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/test/MC/AMDGPU/inline-imm-inv2pi.s [new file with mode: 0644]

index 257638b..e44c019 100644 (file)
@@ -424,8 +424,8 @@ void AMDGPUInstPrinter::printImmediate16(uint32_t Imm,
     O<< "4.0";
   else if (Imm == 0xC400)
     O<< "-4.0";
-  else if (Imm == 0x3118) {
-    assert(STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]);
+  else if (Imm == 0x3118 &&
+           STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) {
     O << "0.15915494";
   } else {
     uint64_t Imm16 = static_cast<uint16_t>(Imm);
diff --git a/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s b/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
new file mode 100644 (file)
index 0000000..e5ecfa2
--- /dev/null
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+
+// The value inv2pi should not assert on any targets, but is
+// printed differently depending on whether it's a legal inline
+// immediate or not.
+
+// SI: v_cvt_f32_f16_e32 v0, 0x3118 ; encoding: [0xff,0x16,0x00,0x7e,0x18,0x31,0x00,0x00]
+// VI: v_cvt_f32_f16_e32 v0, 0.15915494 ; encoding: [0xf8,0x16,0x00,0x7e]
+v_cvt_f32_f16_e32 v0, 0x3118