drm/i915: add Wa_14010594013: icl,ehl

The bspec tells us we need to set this bit to avoid potential underruns.

v2: use new register write convention (Anshuman) add bspec 7386 ref.

Bspec: 7386
Bspec: 33450
Bspec: 33451

Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200114041128.11211-1-matthew.s.atwood@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5e5949e..b93c4c1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7769,6 +7769,7 @@ enum {
 
 #define GEN8_CHICKEN_DCPR_1            _MMIO(0x46430)
 #define   SKL_SELECT_ALTERNATE_DC_EXIT (1 << 30)
+#define   CNL_DELAY_PMRSP              (1 << 22)
 #define   MASK_WAKEMEM                 (1 << 13)
 #define   CNL_DDI_CLOCK_REG_ACCESS_ON  (1 << 7)
 

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8e5f08c..81e5a32 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6643,6 +6643,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
        /* Wa_1407352427:icl,ehl */
        intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
                         0, PSDUNIT_CLKGATE_DIS);
+
+       /*Wa_14010594013:icl, ehl */
+       intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
+                        0, CNL_DELAY_PMRSP);
 }
 
 static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)