media: hantro: Add support for RK356x encoder
authorNicolas Frattaroli <frattaroli.nicolas@gmail.com>
Sun, 12 Jun 2022 15:53:45 +0000 (16:53 +0100)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Fri, 8 Jul 2022 13:54:46 +0000 (14:54 +0100)
The RK3566 and RK3568 SoCs come with a small Hantro instance which is
solely dedicated to encoding. This patch adds the necessary structs to
the Hantro driver to allow the JPEG encoder of it to function.

Through some sleuthing through the vendor's MPP source code and after
closer inspection of the TRM, it was determined that the hardware likely
supports VP8 and H.264 as well.

Tested with the following GStreamer command:

gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \
               filesink location=foo.mkv

Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
drivers/staging/media/hantro/hantro_drv.c
drivers/staging/media/hantro/hantro_hw.h
drivers/staging/media/hantro/rockchip_vpu_hw.c

index 01d33dc..8bbc2f2 100644 (file)
@@ -638,6 +638,7 @@ static const struct of_device_id of_hantro_match[] = {
        { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
        { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
        { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
+       { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
        { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
 #endif
 #ifdef CONFIG_VIDEO_HANTRO_IMX8M
index a2e0f08..24c1f18 100644 (file)
@@ -318,6 +318,7 @@ extern const struct hantro_variant rk3066_vpu_variant;
 extern const struct hantro_variant rk3288_vpu_variant;
 extern const struct hantro_variant rk3328_vpu_variant;
 extern const struct hantro_variant rk3399_vpu_variant;
+extern const struct hantro_variant rk3568_vepu_variant;
 extern const struct hantro_variant rk3568_vpu_variant;
 extern const struct hantro_variant sama5d4_vdec_variant;
 extern const struct hantro_variant sunxi_vpu_variant;
index 098486b..549777b 100644 (file)
@@ -449,6 +449,14 @@ static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = {
        },
 };
 
+static const struct hantro_codec_ops rk3568_vepu_codec_ops[] = {
+       [HANTRO_MODE_JPEG_ENC] = {
+               .run = rockchip_vpu2_jpeg_enc_run,
+               .reset = rockchip_vpu2_enc_reset,
+               .done = rockchip_vpu2_jpeg_enc_done,
+       },
+};
+
 /*
  * VPU variant.
  */
@@ -471,6 +479,10 @@ static const struct hantro_irq rockchip_vpu2_irqs[] = {
        { "vdpu", rockchip_vpu2_vdpu_irq },
 };
 
+static const struct hantro_irq rk3568_vepu_irqs[] = {
+       { "vepu", rockchip_vpu2_vepu_irq },
+};
+
 static const char * const rk3066_vpu_clk_names[] = {
        "aclk_vdpu", "hclk_vdpu",
        "aclk_vepu", "hclk_vepu"
@@ -577,6 +589,19 @@ const struct hantro_variant rk3399_vpu_variant = {
        .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
 };
 
+const struct hantro_variant rk3568_vepu_variant = {
+       .enc_offset = 0x0,
+       .enc_fmts = rockchip_vpu_enc_fmts,
+       .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),
+       .codec = HANTRO_JPEG_ENCODER,
+       .codec_ops = rk3568_vepu_codec_ops,
+       .irqs = rk3568_vepu_irqs,
+       .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs),
+       .init = rockchip_vpu_hw_init,
+       .clk_names = rockchip_vpu_clk_names,
+       .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+};
+
 const struct hantro_variant rk3568_vpu_variant = {
        .dec_offset = 0x400,
        .dec_fmts = rk3399_vpu_dec_fmts,