2015-01-14 Yvan Roux <yvan.roux@linaro.org>
+ Backport from trunk r211783.
+ 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
+
+ * config/arm/arm.c (neon_vector_mem_operand): Allow register
+ POST_MODIFY for neon loads and stores.
+ (arm_print_operand): Output post-index register for neon loads and
+ stores.
+
+2015-01-14 Yvan Roux <yvan.roux@linaro.org>
+
Backport from trunk r218451.
2014-12-06 James Greenhalgh <james.greenhalgh@arm.com>
Sebastian Pop <s.pop@samsung.com>
|| (type == 0 && GET_CODE (ind) == PRE_DEC))
return arm_address_register_rtx_p (XEXP (ind, 0), 0);
- /* FIXME: vld1 allows register post-modify. */
+ /* Allow post-increment by register for VLDn */
+ if (type == 2 && GET_CODE (ind) == POST_MODIFY
+ && GET_CODE (XEXP (ind, 1)) == PLUS
+ && REG_P (XEXP (XEXP (ind, 1), 1)))
+ return true;
/* Match:
(plus (reg)
{
rtx addr;
bool postinc = FALSE;
+ rtx postinc_reg = NULL;
unsigned align, memsize, align_bits;
gcc_assert (MEM_P (x));
postinc = 1;
addr = XEXP (addr, 0);
}
+ if (GET_CODE (addr) == POST_MODIFY)
+ {
+ postinc_reg = XEXP( XEXP (addr, 1), 1);
+ addr = XEXP (addr, 0);
+ }
asm_fprintf (stream, "[%r", REGNO (addr));
/* We know the alignment of this access, so we can emit a hint in the
if (postinc)
fputs("!", stream);
+ if (postinc_reg)
+ asm_fprintf (stream, ", %r", REGNO (postinc_reg));
}
return;