ARM: mvebu: enable the SDHCI interface on Armada 385
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Mon, 14 Apr 2014 14:41:16 +0000 (16:41 +0200)
committerJason Cooper <jason@lakedaemon.net>
Fri, 25 Apr 2014 21:30:08 +0000 (21:30 +0000)
In commit "mmc: sdhci-pxav3: add support for the Armada 38x SDHCI
controller", the sdhci-pxav3 driver has been extended to also be
usable on Armada 38x platforms.

Therefore, this commit adds the necessary Device Tree informations to
declare this SDHCI interface in the Armada 38x SoC, and also in the
Armada 385 Development Board.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1397486478-16991-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-385-db.dts
arch/arm/boot/dts/armada-38x.dtsi

index 6828d77..959aeed 100644 (file)
                                        reg = <0x1000000 0x3f000000>;
                                };
                        };
+
+                       sdhci@d8000 {
+                               clock-frequency = <200000000>;
+                               broken-cd;
+                               wp-inverted;
+                               bus-width = <8>;
+                               status = "okay";
+                       };
                };
 
                pcie-controller {
index 2e1661f..7e1b243 100644 (file)
                                clocks = <&coredivclk 0>;
                                status = "disabled";
                        };
+
+                       sdhci@d8000 {
+                               compatible = "marvell,armada-380-sdhci";
+                               reg = <0xd8000 0x1000>, <0xdc000 0x100>;
+                               interrupts = <0 25 0x4>;
+                               clocks = <&gateclk 17>;
+                               mrvl,clk-delay-cycles = <0x1F>;
+                               status = "disabled";
+                       };
                };
        };