arm64: dts: Add i.MX8MM PCIe EP support

Add i.MX8MM PCIe EP support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 31f4548..a955286 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1315,6 +1315,30 @@
                        status = "disabled";
                };
 
+               pcie0_ep: pcie-ep@33800000 {
+                       compatible = "fsl,imx8mm-pcie-ep";
+                       reg = <0x33800000 0x400000>,
+                             <0x18000000 0x8000000>;
+                       reg-names = "dbi", "addr_space";
+                       num-lanes = <1>;
+                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "dma";
+                       fsl,max-link-speed = <2>;
+                       clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+                                <&clk IMX8MM_CLK_PCIE1_PHY>,
+                                <&clk IMX8MM_CLK_PCIE1_AUX>;
+                       clock-names = "pcie", "pcie_bus", "pcie_aux";
+                       power-domains = <&pgc_pcie>;
+                       resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+                                <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+                       reset-names = "apps", "turnoff";
+                       phys = <&pcie_phy>;
+                       phy-names = "pcie-phy";
+                       num-ib-windows = <4>;
+                       num-ob-windows = <4>;
+                       status = "disabled";
+               };
+
                gpu_3d: gpu@38000000 {
                        compatible = "vivante,gc";
                        reg = <0x38000000 0x8000>;