drm/i915: Add Pipe D cursor ctrl register for Gen12
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 24 Sep 2019 07:31:52 +0000 (13:01 +0530)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 24 Sep 2019 17:56:28 +0000 (10:56 -0700)
Currently the offset for PIPE D cursor control register is missing in
i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
This also causes kernel Warning, when a user requests to enable cursor
plane for PIPE D for Gen 12 platforms.

This patch adds the CURSOR_CTL_D register in the i915_reg.h.

v2: Rebase

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111640
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
[Lucas: remove extra blank line]
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1569310312-12313-1-git-send-email-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/i915_reg.h

index c2faa67..43530b0 100644 (file)
                [PIPE_C] = IVB_CURSOR_C_OFFSET, \
        }
 
+#define TGL_CURSOR_OFFSETS \
+       .cursor_offsets = { \
+               [PIPE_A] = CURSOR_A_OFFSET, \
+               [PIPE_B] = IVB_CURSOR_B_OFFSET, \
+               [PIPE_C] = IVB_CURSOR_C_OFFSET, \
+               [PIPE_D] = TGL_CURSOR_D_OFFSET, \
+       }
+
 #define I9XX_COLORS \
        .color = { .gamma_lut_size = 256 }
 #define I965_COLORS \
@@ -787,6 +795,7 @@ static const struct intel_device_info intel_elkhartlake_info = {
                [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
                [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
        }, \
+       TGL_CURSOR_OFFSETS, \
        .has_global_mocs = 1, \
        .display.has_dsb = 1
 
index a69c19a..28c483a 100644 (file)
@@ -6240,6 +6240,7 @@ enum {
 #define CHV_CURSOR_C_OFFSET 0x700e0
 #define IVB_CURSOR_B_OFFSET 0x71080
 #define IVB_CURSOR_C_OFFSET 0x72080
+#define TGL_CURSOR_D_OFFSET 0x73080
 
 /* Display A control */
 #define _DSPACNTR                              0x70180