/*
* Missing operand size and a candidate for fuzzy matching...
*/
- for (i = 0; i < temp->operands; i++) {
- if ((temp->opd[i] & SAME_AS) == 0)
- xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
- }
+ for (i = 0; i < temp->operands; i++)
+ xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
opsizemissing = true;
}
if (m > merr)
* guess it either from template (IF_S* flag) or
* from code bits.
*
- * 2) If template operand (i) has SAME_AS flag [used for registers only]
- * (ie the same operand as was specified somewhere in template, and
- * this referred operand index is being achieved via ~SAME_AS)
- * we are to be sure that both registers (in template and instruction)
- * do exactly match.
- *
- * 3) If template operand do not match the instruction OR
+ * 2) If template operand do not match the instruction OR
* template has an operand size specified AND this size differ
* from which instruction has (perhaps we got it from code bits)
* we are:
if (!(type & SIZE_MASK))
type |= size[i];
- if (itemp->opd[i] & SAME_AS) {
- int j = itemp->opd[i] & ~SAME_AS;
- if (type != instruction->oprs[j].type ||
- instruction->oprs[i].basereg != instruction->oprs[j].basereg)
- return MERR_INVALOP;
- } else if (itemp->opd[i] & ~type & ~SIZE_MASK) {
+ if (itemp->opd[i] & ~type & ~SIZE_MASK) {
return MERR_INVALOP;
} else if ((itemp->opd[i] & SIZE_MASK) &&
(itemp->opd[i] & SIZE_MASK) != (type & SIZE_MASK)) {
* XXX: Need to make sure this is actually correct.
*/
for (i = 0; i < (*p)->operands; i++) {
- if (!((*p)->opd[i] & SAME_AS) &&
- (
+ if (
/* If it's a mem-only EA but we have a
register, die. */
((tmp_ins.oprs[i].segment & SEG_RMREG) &&
(tmp_ins.oprs[i].segment & SEG_RMREG)) &&
!whichreg((*p)->opd[i],
tmp_ins.oprs[i].basereg, tmp_ins.rex))
- )) {
+ ) {
works = false;
break;
}
const operand *o = &ins.oprs[i];
int64_t offs;
- if (t & SAME_AS) {
- o = &ins.oprs[t & ~SAME_AS];
- t = (*p)->opd[t & ~SAME_AS];
- }
-
output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
offs = o->offset;
@ops = ();
if ($operands ne 'void') {
foreach $op (split(/,/, $operands)) {
- if ($op =~ /^\=([0-9]+)$/) {
- $op = "same_as|$1";
- } else {
- @opx = ();
- foreach $opp (split(/\|/, $op)) {
- @oppx = ();
- if ($opp =~ s/(?<=\D)(8|16|32|64|80|128|256)$//) {
- push(@oppx, "bits$1");
- }
- $opp =~ s/^mem$/memory/;
- $opp =~ s/^memory_offs$/mem_offs/;
- $opp =~ s/^imm$/immediate/;
- $opp =~ s/^([a-z]+)rm$/rm_$1/;
- $opp =~ s/^rm$/rm_gpr/;
- $opp =~ s/^reg$/reg_gpr/;
- push(@opx, $opp, @oppx);
+ @opx = ();
+ foreach $opp (split(/\|/, $op)) {
+ @oppx = ();
+ if ($opp =~ s/(?<=\D)(8|16|32|64|80|128|256)$//) {
+ push(@oppx, "bits$1");
}
- $op = join('|', @opx);
+ $opp =~ s/^mem$/memory/;
+ $opp =~ s/^memory_offs$/mem_offs/;
+ $opp =~ s/^imm$/immediate/;
+ $opp =~ s/^([a-z]+)rm$/rm_$1/;
+ $opp =~ s/^rm$/rm_gpr/;
+ $opp =~ s/^reg$/reg_gpr/;
+ push(@opx, $opp, @oppx);
}
+ $op = join('|', @opx);
push(@ops, $op);
}
}
#define SDWORD (GEN_SUBCLASS(3) | IMMEDIATE) /* operand is in the range -0x80000000..0x7FFFFFFF */
#define UDWORD (GEN_SUBCLASS(4) | IMMEDIATE) /* operand is in the range 0..0xFFFFFFFF */
-/* special flags */
-#define SAME_AS GEN_SPECIAL(0)
-
#endif /* NASM_OPFLAGS_H */