deinterlace: change holdline default value to 8 [1/1]
authorJihong Sui <jihong.sui@amlogic.com>
Thu, 10 Jan 2019 12:48:47 +0000 (20:48 +0800)
committerLuan Yuan <luan.yuan@amlogic.com>
Tue, 15 Jan 2019 11:49:48 +0000 (19:49 +0800)
PD#SWPL-3384

Problem:
DI post holdline setting is not map with video

Solution:
change holdline to 8

Verify:
verified by gxl

Change-Id: Ia352604086cefb4c69d5dd268d12741c4cf4f173
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
drivers/amlogic/media/deinterlace/deinterlace.c

index 79fb623..4a0afc0 100644 (file)
@@ -263,7 +263,7 @@ static long same_field_bot_count;
  * 1, keep 4 buffers in pre_ready_list for checking;
  */
 
-static int post_hold_line = 17;/* for m8 1080i/50 output */
+static int post_hold_line = 8; /*2019-01-10: from VLSI feijun from 17 to 8*/
 static int post_urgent = 1;
 
 /*pre process speed debug */
@@ -7405,6 +7405,7 @@ static void set_di_flag(void)
                post_hold_line =
                        (is_meson_g12a_cpu() || is_meson_g12b_cpu())?10:17;
        } else {
+               post_hold_line = 8;     /*2019-01-10: from VLSI feijun*/
                mcpre_en = false;
                pulldown_enable = false;
                di_pre_rdma_enable = false;