targetDiag(D->getLocation(), diag::note_defined_here, FD) << D;
}
+ // RISC-V vector builtin types (RISCVVTypes.def)
+ if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ false) &&
+ !Context.getTargetInfo().hasFeature("zve64x"))
+ Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64x";
if (Ty->isRVVType(/* Bitwidth */ 16, /* IsFloat */ true) &&
- !Context.getTargetInfo().hasFeature("experimental-zvfh")) {
+ !Context.getTargetInfo().hasFeature("experimental-zvfh"))
Diag(Loc, diag::err_riscv_type_requires_extension, FD)
<< Ty << "zvfh";
- }
+ if (Ty->isRVVType(/* Bitwidth */ 32, /* IsFloat */ true) &&
+ !Context.getTargetInfo().hasFeature("zve32f"))
+ Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve32f";
+ if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ true) &&
+ !Context.getTargetInfo().hasFeature("zve64d"))
+ Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64d";
// Don't allow SVE types in functions without a SVE target.
if (Ty->isSVESizelessBuiltinType() && FD && FD->hasBody()) {
void RISCVIntrinsicManagerImpl::InitIntrinsicList() {
const TargetInfo &TI = Context.getTargetInfo();
- bool HasVectorFloat32 = TI.hasFeature("zve32f");
- bool HasVectorFloat64 = TI.hasFeature("zve64d");
bool HasRV64 = TI.hasFeature("64bit");
bool HasFullMultiply = TI.hasFeature("v");
continue;
// Check requirement.
- if (BaseType == BasicType::Float32 && !HasVectorFloat32)
- continue;
-
- if (BaseType == BasicType::Float64 && !HasVectorFloat64)
- continue;
-
if (((Record.RequiredExtensions & RVV_REQ_RV64) == RVV_REQ_RV64) &&
!HasRV64)
continue;
--- /dev/null
+// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
+// RUN: -target-feature +zve32x -target-feature +zfh \
+// RUN: -disable-O0-optnone -o - -fsyntax-only %s -verify
+// REQUIRES: riscv-registered-target
+#include <riscv_vector.h>
+
+vfloat32m1_t foo() { /* expected-error {{RISC-V type 'vfloat32m1_t' (aka '__rvv_float32m1_t') requires the 'zve32f' extension}} */
+} /* expected-warning {{non-void function does not return a value}}*/
--- /dev/null
+// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
+// RUN: -target-feature +zve64f -target-feature +zfh \
+// RUN: -disable-O0-optnone -o - -fsyntax-only %s -verify
+// REQUIRES: riscv-registered-target
+#include <riscv_vector.h>
+
+vfloat64m1_t foo() { /* expected-error {{RISC-V type 'vfloat64m1_t' (aka '__rvv_float64m1_t') requires the 'zve64d' extension}} */
+} /* expected-warning {{non-void function does not return a value}}*/
--- /dev/null
+// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
+// RUN: -target-feature +zve32x -target-feature +zfh \
+// RUN: -disable-O0-optnone -o - -fsyntax-only %s -verify
+// REQUIRES: riscv-registered-target
+#include <riscv_vector.h>
+
+vint64m1_t foo() { /* expected-error {{RISC-V type 'vint64m1_t' (aka '__rvv_int64m1_t') requires the 'zve64x' extension}} */
+} /* expected-warning {{non-void function does not return a value}}*/
printType(*T);
}
- OS << "#if (__riscv_v_elen_fp >= 32)\n";
for (int Log2LMUL : Log2LMULs) {
auto T = TypeCache.computeType(BasicType::Float32, Log2LMUL,
PrototypeDescriptor::Vector);
if (T)
printType(*T);
}
- OS << "#endif\n";
- OS << "#if (__riscv_v_elen_fp >= 64)\n";
for (int Log2LMUL : Log2LMULs) {
auto T = TypeCache.computeType(BasicType::Float64, Log2LMUL,
PrototypeDescriptor::Vector);
if (T)
printType(*T);
}
- OS << "#endif\n\n";
OS << "#define __riscv_v_intrinsic_overloading 1\n";