r600g: enable streamout by default on r7xx and DRM 2.17.0
authorMarek Olšák <maraeo@gmail.com>
Sun, 17 Jun 2012 15:54:38 +0000 (17:54 +0200)
committerMarek Olšák <maraeo@gmail.com>
Sun, 17 Jun 2012 16:28:32 +0000 (18:28 +0200)
Now that it's in Linus's tree.

Has anyone had a chance to test streamout on Cayman recently?

src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/r600/r600_pipe.h
src/gallium/drivers/r600/r600_state.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
src/gallium/winsys/radeon/drm/radeon_winsys.h

index e0ee823..e9b1445 100644 (file)
@@ -414,9 +414,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        /* Stream output. */
        case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-               return rscreen->info.r600_has_streamout ? 4 : 0;
+               return rscreen->has_streamout ? 4 : 0;
        case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-               return rscreen->info.r600_has_streamout ? 1 : 0;
+               return rscreen->has_streamout ? 1 : 0;
        case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
        case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
                return 16*4;
@@ -898,11 +898,18 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
                rscreen->chip_class = R600;
        }
 
-       /* XXX streamout is said to be broken on r700 and cayman */
-       if ((rscreen->chip_class == R700 ||
-            rscreen->chip_class == CAYMAN) &&
-           !debug_get_bool_option("R600_STREAMOUT", FALSE)) {
-               rscreen->info.r600_has_streamout = false;
+       /* Figure out streamout kernel support. */
+       switch (rscreen->chip_class) {
+       case R600:
+       case EVERGREEN:
+               rscreen->has_streamout = rscreen->info.drm_minor >= 13;
+               break;
+       case R700:
+               rscreen->has_streamout = rscreen->info.drm_minor >= 17;
+               break;
+       /* TODO: Cayman */
+       default:
+               rscreen->has_streamout = debug_get_bool_option("R600_STREAMOUT", FALSE);
        }
 
        if (r600_init_tiling(rscreen)) {
index f2865d2..b5eff34 100644 (file)
@@ -128,6 +128,7 @@ struct r600_screen {
        unsigned                        family;
        enum chip_class                 chip_class;
        struct radeon_info              info;
+       bool                            has_streamout;
        struct r600_tiling_info         tiling_info;
        struct r600_pipe_fences         fences;
 
index 124eba2..fc75781 100644 (file)
@@ -2215,7 +2215,7 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
        r600_store_context_reg(cb, R_0288A4_SQ_PGM_RESOURCES_FS, 0);
        r600_store_context_reg(cb, R_0288DC_SQ_PGM_CF_OFFSET_FS, 0);
 
-       if (rctx->chip_class == R700 && rctx->screen->info.r600_has_streamout)
+       if (rctx->chip_class == R700 && rctx->screen->has_streamout)
                r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
        r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
 
index a831816..d1ef252 100644 (file)
@@ -299,8 +299,6 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
                                       &ws->info.r600_ib_vm_max_size))
                 ws->info.r600_virtual_address = FALSE;
         }
-
-       ws->info.r600_has_streamout = ws->info.drm_minor >= 13;
     }
 
     /* Get max pipes, this is only needed for compute shaders.  All evergreen+
index 4aa7cfc..6039910 100644 (file)
@@ -98,7 +98,6 @@ struct radeon_info {
     boolean r600_virtual_address;
     uint32_t r600_va_start;
     uint32_t r600_ib_vm_max_size;
-    boolean r600_has_streamout;
     uint32_t r600_max_pipes;
 };