[PORT FROM R2]Battery: Added a WA to retry reading fault status register
authorsantosh <santoshx.gugwad@intel.com>
Tue, 28 Feb 2012 12:23:16 +0000 (17:53 +0530)
committerbuildbot <buildbot@intel.com>
Tue, 6 Mar 2012 21:51:02 +0000 (13:51 -0800)
BZ: 22687

Due to MSIC HW bug, the charger fault register bits are not getting
updated immediately when the charging is enabled.

This patch adds a WA to retry the reading of charger fault register
before it report charger fault.

Change-Id: I56a5a0b40339b0881a185988f8e0ae1826403e46
Orig-Change-Id: I2235ac3a27072375e04e770ef4efe62ff9fa3260
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Signed-off-by: santosh <santoshx.gugwad@intel.com>
Reviewed-on: http://android.intel.com:8080/36852
Tested-by: Kallappa Manjanna, MadhukumarX <madhukumarx.kallappa.manjanna@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
drivers/power/intel_mdf_battery.c
drivers/power/intel_mdf_charger.h

index 05db5e0..b3a9b4e 100644 (file)
@@ -742,7 +742,7 @@ ipcread_err:
 static bool is_charger_fault(void)
 {
        uint8_t fault_reg, chrctrl_reg, stat, spwrsrcint_reg;
-       int chr_mode, retval = 0;
+       int chr_mode, i, retval = 0;
        int adc_temp, adc_usb_volt, batt_volt;
        struct ipc_device *ipcdev = container_of(msic_dev,
                                        struct ipc_device, dev);
@@ -783,17 +783,34 @@ static bool is_charger_fault(void)
        if (chrctrl_reg & CHRCNTL_CHRG_DISABLE)
                return false;
 
-       retval = intel_scu_ipc_ioread8(CHR_STATUS_FAULT_REG, &fault_reg);
-       if (retval) {
-               retval = handle_ipc_rw_status(retval, CHR_STATUS_FAULT_REG,
-                               MSIC_IPC_READ);
-               if (retval)
-                       return false;
+       /* due to MSIC HW bug, the fault register is not getting updated
+        * immediately after the charging is enabled. As a SW WA the
+        * driver will retry reading the fault registers for 3 times
+        * with delay of 1 mSec.
+        */
+       for (i = 0; i < CHR_READ_RETRY_CNT; i++) {
+               retval = intel_scu_ipc_ioread8(CHR_STATUS_FAULT_REG,
+                                                               &fault_reg);
+               if (retval) {
+                       retval = handle_ipc_rw_status(retval,
+                                       CHR_STATUS_FAULT_REG, MSIC_IPC_READ);
+                       if (retval)
+                               return retval;
+               }
+
+               stat = (fault_reg & CHR_STATUS_BIT_MASK) >> CHR_STATUS_BIT_POS;
+               if (stat == CHR_STATUS_BIT_READY) {
+                       dev_info(msic_dev, "retry reading Fault Reg:0x%x\n",
+                                                               fault_reg);
+                       mdelay(30);
+                       continue;
+               }
+               break;
        }
 
-       /*If charger is enabled and STAT(0:1) shows charging progress or
-        * charging done then we report false*/
-       stat = (fault_reg & CHR_STATUS_BIT_MASK) >> CHR_STATUS_BIT_POS;
+       /* if charger is enabled and STAT(0:1) shows charging
+       * progress or charging done then we report false
+       */
        if (stat == CHR_STATUS_BIT_PROGRESS ||
                stat == CHR_STATUS_BIT_CYCLE_DONE)
                return false;
index 3801545..040d326 100644 (file)
 #define MAX_IPC_ERROR_COUNT 20
 
 #define CHR_WRITE_RETRY_CNT 3
+#define CHR_READ_RETRY_CNT 5
 
 /*
  * Each LSB of Charger LED PWM register