drm/i915/gt: Only ignore already reset requests
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 7 Feb 2020 16:16:02 +0000 (16:16 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 7 Feb 2020 20:52:41 +0000 (20:52 +0000)
If a request is being re-run after an innocent reset, it is marked as
-EAGAIN. So only skip an engine reset if the request is marked as -EIO.

Testcase: igt/gem_ctx_exec/basic-nohangcheck
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207161602.2838218-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/i915_gem_context.c
drivers/gpu/drm/i915/gt/intel_reset.c

index 52a7496..cfaf5bb 100644 (file)
@@ -419,7 +419,7 @@ static struct intel_engine_cs *__active_engine(struct i915_request *rq)
        }
 
        engine = NULL;
-       if (i915_request_is_active(rq) && !rq->fence.error)
+       if (i915_request_is_active(rq) && rq->fence.error != -EIO)
                engine = rq->engine;
 
        spin_unlock_irq(&locked->active.lock);
index a8317e0..aef6ab5 100644 (file)
@@ -1182,7 +1182,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
 
        kobject_uevent_env(kobj, KOBJ_CHANGE, error_event);
 
-       drm_dbg(&gt->i915->drm, "resetting chip\n");
+       drm_dbg(&gt->i915->drm, "resetting chip, engines=%x\n", engine_mask);
        kobject_uevent_env(kobj, KOBJ_CHANGE, reset_event);
 
        /* Use a watchdog to ensure that our reset completes */