drm/amdgpu: fix regresstion on SR-IOV gpu reset failed
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 18 Oct 2017 09:19:42 +0000 (17:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Oct 2017 19:27:16 +0000 (15:27 -0400)
fw ucode is corrupted after vf flr by PSP so ucode_init() is
a must in psp_hw_init othewise KIQ/KCQ enabling will fail

Revert "drm/amdgpu: refine code delete duplicated error handling"
This reverts commit e57b87ff828f95efe992468e6d18c2c059b27aa9.
Revert "drm/amdgpu: move amdgpu_ucode_init_bo to amdgpu_device.c"
This reverts commit 815b8f8595148d06a64d2ce4282e8e80dfcb02f1.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

index 9cdaba4af216ac0d9c156cb894211486fe13c3fd..0731b4f9b25ca6f1496ef86bedbcee120c873fc5 100644 (file)
@@ -1679,7 +1679,6 @@ static int amdgpu_init(struct amdgpu_device *adev)
                        return r;
                }
                adev->ip_blocks[i].status.sw = true;
-
                /* need to do gmc hw init early so we can allocate gpu mem */
                if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
                        r = amdgpu_vram_scratch_init(adev);
@@ -1710,11 +1709,6 @@ static int amdgpu_init(struct amdgpu_device *adev)
                }
        }
 
-       mutex_lock(&adev->firmware.mutex);
-       if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT)
-               amdgpu_ucode_init_bo(adev);
-       mutex_unlock(&adev->firmware.mutex);
-
        for (i = 0; i < adev->num_ip_blocks; i++) {
                if (!adev->ip_blocks[i].status.sw)
                        continue;
@@ -1850,8 +1844,6 @@ static int amdgpu_fini(struct amdgpu_device *adev)
 
                adev->ip_blocks[i].status.hw = false;
        }
-       if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT)
-               amdgpu_ucode_fini_bo(adev);
 
        for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
                if (!adev->ip_blocks[i].status.sw)
index 3b42f407971d29d0b2c59bcbf5cd661945e8ccb1..5f5aa5fddc169355077a4e61665563c087d860f5 100644 (file)
@@ -145,6 +145,8 @@ static int amdgpu_pp_hw_init(void *handle)
        int ret = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
+               amdgpu_ucode_init_bo(adev);
 
        if (adev->powerplay.ip_funcs->hw_init)
                ret = adev->powerplay.ip_funcs->hw_init(
@@ -162,6 +164,9 @@ static int amdgpu_pp_hw_fini(void *handle)
                ret = adev->powerplay.ip_funcs->hw_fini(
                                        adev->powerplay.pp_handle);
 
+       if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
+               amdgpu_ucode_fini_bo(adev);
+
        return ret;
 }
 
index f1035a689d354349aaac7b7b79e1eaa51cf6e4a8..447d446b50150d475cb9a01945706b17bbfc2e78 100644 (file)
@@ -411,6 +411,13 @@ static int psp_hw_init(void *handle)
                return 0;
 
        mutex_lock(&adev->firmware.mutex);
+       /*
+        * This sequence is just used on hw_init only once, no need on
+        * resume.
+        */
+       ret = amdgpu_ucode_init_bo(adev);
+       if (ret)
+               goto failed;
 
        ret = psp_load_fw(adev);
        if (ret) {
@@ -435,6 +442,8 @@ static int psp_hw_fini(void *handle)
        if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
                return 0;
 
+       amdgpu_ucode_fini_bo(adev);
+
        psp_ring_destroy(psp, PSP_RING_TYPE__KM);
 
        amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);