}
EXPORT_SYMBOL(timestamp_pcrscr_get);
+void timestamp_set_pcrlatency(u32 latency)
+{
+ if (latency < 500 * 90)
+ pcrscr_lantcy = latency;
+}
+EXPORT_SYMBOL(timestamp_set_pcrlatency);
+
+u32 timestamp_get_pcrlatency(void)
+{
+ return pcrscr_lantcy;
+}
+EXPORT_SYMBOL(timestamp_get_pcrlatency);
+
u32 timestamp_tsdemux_pcr_get(void)
{
if (tsdemux_pcrscr_get_cb)
return sprintf(buf, "0x%x\n", tsync_get_startsync_mode());
}
+static ssize_t show_latency(struct class *class,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "%u\n", timestamp_get_pcrlatency());
+}
+
+static ssize_t store_latency(struct class *class,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ unsigned int latency = 0;
+ ssize_t r;
+
+ r = kstrtoint(buf, 0, &latency);
+ if (r != 0)
+ return -EINVAL;
+ timestamp_set_pcrlatency(latency);
+ return size;
+}
static ssize_t show_apts_lookup(struct class *class,
struct class_attribute *attrr, char *buf)
NULL),
__ATTR(checkin_firstapts, 0644, show_checkin_firstapts,
NULL),
+ __ATTR(pts_latency, 0664, show_latency, store_latency),
__ATTR_NULL
};
extern void set_pts_realign(void);
+extern void timestamp_set_pcrlatency(u32 latency);
+extern u32 timestamp_get_pcrlatency(void);
+
static inline u32 tsync_vpts_discontinuity_margin(void)
{
return tsync_get_av_threshold_min();
{
struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
struct aml_spdif *p_spdif = snd_soc_dai_get_drvdata(cpu_dai);
+ unsigned int mpll_freq = 0;
+ int ret;
int sysclk = p_spdif->sysclk_freq;
int value = ucontrol->value.enumerated.item[0];
-
if (value > 2000000 || value < 0) {
pr_err("Fine spdif sysclk setting range(0~2000000), %d\n",
value);
return 0;
}
- sysclk += (value - 1000000);
-
- aml_dai_set_spdif_sysclk(cpu_dai, 0, sysclk, 0);
-
+ value = value - 1000000;
+ sysclk += value;
+ /* pr_info("spdif_set %d to %d,diff %d\n",
+ * p_spdif->sysclk_freq,sysclk,value);
+ */
+ mpll_freq = sysclk * 4;
+ p_spdif->sysclk_freq = sysclk;
+ clk_set_rate(p_spdif->sysclk, mpll_freq);
+ clk_set_rate(p_spdif->clk_spdifout, p_spdif->sysclk_freq);
+ ret = clk_prepare_enable(p_spdif->sysclk);
+ if (ret) {
+ pr_err("Can't enable pcm sysclk clock: %d\n", ret);
+ return 0;
+ }
+ ret = clk_prepare_enable(p_spdif->clk_spdifout);
+ if (ret) {
+ pr_err("Can't enable clk_spdifout clock: %d\n", ret);
+ return 0;
+ }
return 0;
}