+2007-07-07 Kazu Hirata <kazu@codesourcery.com>
+
+ * auto-inc-dec.c, config/arm/arm.c,
+ config/m32r/constraints.md, config/mips/mips.md,
+ config/rs6000/rs6000.c, cselib.c, dce.c, df-core.c,
+ df-problems.c, df-scan.c, df.h, dse.c, gimplify.c,
+ tree-if-conv.c, tree-ssa-sccvn.c, tree-ssa.c: Fix comment
+ typos. Follow spelling conventions.
+ * doc/invoke.texi, doc/rtl.texi: Fix typos.
+
2007-07-06 Daniel Berlin <dberlin@dberlin.org>
Fix PR tree-optimization/23488
next add or inc, not the next insn that used the
reg. Because we are going to increment the reg
in this form, we need to make sure that there
- were no interveining uses of reg. */
+ were no intervening uses of reg. */
if (inc_insn.insn != other_insn)
return false;
}
gcc_assert (mantissa >= 16 && mantissa <= 31);
/* The value of 5 here would be 4 if GCC used IEEE754-like encoding (where
- normalised significands are in the range [1, 2). (Our mantissa is shifted
- left 4 places at this point relative to normalised IEEE754 values). GCC
+ normalized significands are in the range [1, 2). (Our mantissa is shifted
+ left 4 places at this point relative to normalized IEEE754 values). GCC
internally uses [0.5, 1) (see real.c), so the exponent returned from
REAL_EXP must be altered. */
exponent = 5 - exponent;
;; Extra constraints
(define_constraint "Q"
- "A symbolic addresse loadable when ld24."
+ "A symbolic address loadable when ld24."
(ior (and (match_test "TARGET_ADDR24")
(match_test "GET_CODE (op) == LABEL_REF"))
(match_test "addr24_operand (op, VOIDmode)")))
(define_constraint "R"
- "A symbolic addresse loadable with ld24 can't be used."
+ "A symbolic address loadable with ld24 can't be used."
(ior (and (match_test "TARGET_ADDR32")
(match_test "GET_CODE (op) == LABEL_REF"))
(match_test "addr32_operand (op, VOIDmode)")))
;; logical integer logical instructions
;; shift integer shift instructions
;; slt set less than instructions
-;; signext sign extend instuctions
+;; signext sign extend instructions
;; clz the clz and clo instructions
;; trap trap if instructions
;; imul integer multiply 2 operands
else
{
/* Make r11 point to the start of the SPE save area. We worried about
- not clobbering it when we were saving registers in the prolgoue.
+ not clobbering it when we were saving registers in the prologue.
There's no need to worry here because the static chain is passed
anew to every function. */
spe_save_area_ptr = gen_rtx_REG (Pmode, 11);
int regno = REGNO (orig);
/* The only thing that we are not willing to do (this
- is requirement of dse and if others potiential uses
+ is requirement of dse and if others potential uses
need this function we should add a parm to control
it) is that we will not substitute the
STACK_POINTER_REGNUM, FRAME_POINTER or the
/* UD-based DSE routines. */
-/* Mark instructions that define artifically-used registers, such as
+/* Mark instructions that define artificially-used registers, such as
the frame pointer and the stack pointer. */
static void
insns when only a small number of them have really changed.
4) Do it yourself - In this mechanism, the pass updates the insns
- itself using the low level df primatives. Currently no pass does
+ itself using the low level df primitives. Currently no pass does
this, but it has the advantage that it is quite efficient given
that the pass generally has exact knowledge of what it is changing.
/* Verify that there is a place for everything and everything is in
its place. This is too expensive to run after every pass in the
mainline. However this is an excellent debugging tool if the
- dataflow infomation is not being updated properly. You can just
+ dataflow information is not being updated properly. You can just
sprinkle calls in until you find the place that is changing an
underlying structure without calling the proper updating
routine. */
df_ru_top_dump, /* Debugging start block. */
df_ru_bottom_dump, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
NULL, /* Dependent problem. */
TV_DF_RU, /* Timing variable. */
true /* Reset blocks on dropping out of blocks_to_analyze. */
df_rd_top_dump, /* Debugging start block. */
df_rd_bottom_dump, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
NULL, /* Dependent problem. */
TV_DF_RD, /* Timing variable. */
true /* Reset blocks on dropping out of blocks_to_analyze. */
df_urec_top_dump, /* Debugging start block. */
df_urec_bottom_dump, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
&problem_LR, /* Dependent problem. */
TV_DF_UREC, /* Timing variable. */
false /* Reset blocks on dropping out of blocks_to_analyze. */
df_chain_top_dump, /* Debugging start block. */
df_chain_bottom_dump, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
&problem_RD, /* Dependent problem. */
TV_DF_CHAIN, /* Timing variable. */
false /* Reset blocks on dropping out of blocks_to_analyze. */
NULL, /* Debugging start block. */
NULL, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
/* Technically this is only dependent on the live registers problem
but it will produce information if built one of uninitialized
df_scan_start_block, /* Debugging start block. */
NULL, /* Debugging end block. */
NULL, /* Incremental solution verify start. */
- NULL, /* Incremental solution verfiy end. */
+ NULL, /* Incremental solution verify end. */
NULL, /* Dependent problem. */
TV_DF_SCAN, /* Timing variable. */
false /* Reset blocks on dropping out of blocks_to_analyze. */
{
bitmap_clear (eh_block_artificial_uses);
- /* The following code (down thru the arg_pointer seting APPEARS
+ /* The following code (down thru the arg_pointer setting APPEARS
to be necessary because there is nothing that actually
describes what the exception handling code may actually need
to keep alive. */
addresses. It is incremented whenever a ref is created. */
unsigned int ref_order;
- /* Problem specific control infomation. */
+ /* Problem specific control information. */
enum df_changeable_flags changeable_flags;
};
This option will enable GCC to use RCPSS and RSQRTSS instructions (and their
vectorized variants RCPPS and RSQRTPS) instead of DIVSS and SQRTSS (and their
vectorized variants). These instructions will be generated only when
-@option{-funsafe-math-optimizatons} is enabled.
+@option{-funsafe-math-optimizations} is enabled.
@item -mpush-args
@itemx -mno-push-args
dependencies between instructions within a basic block. Neither a jump
nor a label may come between the related insns. These are only used by
the schedulers and by combine. This is a deprecated data structure.
-Def-use and use-def chains are now prefered.
+Def-use and use-def chains are now preferred.
@findex REG_NOTES
@item REG_NOTES (@var{i})
... <- A
flow would replace the right hand side of the second insn with a
- reference to r100. Most of the infomation is available to add this
+ reference to r100. Most of the information is available to add this
to this pass. It has not done it because it is a lot of work in
the case that either r100 is assigned to between the first and
second insn and/or the second insn is a load of part of the value
insn. If the insn is deletable, it contains only one mem set.
But it could also contain clobbers. Insns that contain more than
one mem set are not deletable, but each of those mems are here in
- order to provied info to delete other insns. */
+ order to provide info to delete other insns. */
store_info_t store_rec;
/* The linked list of mem uses in this insn. Only the reads from
rtx canon_base_mem;
/* These two sets of two bitmaps are used to keep track of how many
- stores are actually referencing that postion from this base. We
+ stores are actually referencing that position from this base. We
only do this for rtx bases as this will be used to assign
- postions in the bitmaps for the global problem. Bit N is set in
+ positions in the bitmaps for the global problem. Bit N is set in
store1 on the first store for offset N. Bit N is set in store2
for the second store to offset N. This is all we need since we
only care about offsets that have two or more stores for them.
deleted. */
bitmap store1_n, store1_p, store2_n, store2_p;
- /* The postions in this bitmap have the same assignments as the in,
+ /* The positions in this bitmap have the same assignments as the in,
out, gen and kill bitmaps. This bitmap is all zeros except for
- the postions that are occupied by stores for this group. */
+ the positions that are occupied by stores for this group. */
bitmap group_kill;
/* True if there are any positions that are to be processed
bool frame_related;
/* The offset_map is used to map the offsets from this base into
- postions in the global bitmaps. It is only created after all of
+ positions in the global bitmaps. It is only created after all of
the all of stores have been scanned and we know which ones we
care about. */
int *offset_map_n, *offset_map_p;
bool delete = true;
/* Skip the clobbers. We delete the active insn if this insn
- shaddows the set. To have been put on the active list, it
+ shadows the set. To have been put on the active list, it
has exactly on set. */
while (!s_info->is_set)
s_info = s_info->next;
Assign each byte position in the stores that we are going to
analyze globally to a position in the bitmaps. Returns true if
- there are any bit postions assigned.
+ there are any bit positions assigned.
----------------------------------------------------------------------------*/
static void
}
}
/* We do want to process the local info if the insn was
- deleted. For insntance, if the insn did a wild read, we
+ deleted. For instance, if the insn did a wild read, we
no longer need to trash the info. */
if (insn_info->insn
&& INSN_P (insn_info->insn)
i++, p = TREE_CHAIN (p))
{
/* We cannot distinguish a varargs function from the case
- of excess parameters, still defering the inlining decision
+ of excess parameters, still deferring the inlining decision
to the callee is possible. */
if (!p)
break;
/* During if-conversion aux field from basic block structure is used to hold
predicate list. Clean each basic block's predicate list for the given LOOP.
- Also clean aux field of succesor edges, used to hold true and false
+ Also clean aux field of successor edges, used to hold true and false
condition from conditional expression. */
static void
}
result = fold_binary (TREE_CODE (rhs), TREE_TYPE (rhs), op0, op1);
- /* Make sure result is not a complex expression consiting
+ /* Make sure result is not a complex expression consisting
of operators of operators (IE (a + b) + (a + c))
Otherwise, we will end up with unbounded expressions if
fold does anything at all. */
/* Otherwise pointers/references are equivalent if their pointed
to types are effectively the same. We can strip qualifiers
- on pointed-to types for further comparsion, which is done in
+ on pointed-to types for further comparison, which is done in
the callee. */
return useless_type_conversion_p (TREE_TYPE (outer_type),
TREE_TYPE (inner_type));
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