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dt-bingings:clk: remove dec_rootclk fixed clk define.
author
samin
<samin.guo@starfivetech.com>
Fri, 15 Apr 2022 02:15:59 +0000
(10:15 +0800)
committer
samin
<samin.guo@starfivetech.com>
Mon, 18 Apr 2022 07:56:42 +0000
(15:56 +0800)
The clktree is ready. The VDEC uses the clock signal defined by the
clock tree, fixed-clk is not required.
Signed-off-by: samin <samin.guo@starfivetech.com>
arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
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diff --git
a/arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
b/arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
index
2fb56a5
..
8df5978
100755
(executable)
--- a/
arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
+++ b/
arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
@@
-87,12
+87,6
@@
clock-frequency = <204800000>;
};
- vdec_rootclk: vdec_rootclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <400000000>;
- };
-
venc_rootclk: venc_rootclk {
compatible = "fixed-clock";
#clock-cells = <0>;