+2019-03-22 Alan Hayward <alan.hayward@arm.com>
+ Jiong Wang <jiong.wang@arm.com>
+
+ * aarch64-linux-nat.c
+ (aarch64_linux_nat_target::read_description): Add pauth param.
+ * aarch64-linux-tdep.c
+ (aarch64_linux_core_read_description): Likewise.
+ * aarch64-tdep.c (struct target_desc): Add in pauth.
+ (aarch64_read_description): Add pauth param.
+ (aarch64_gdbarch_init): Likewise.
+ * aarch64-tdep.h (aarch64_read_description): Likewise.
+ * arch/aarch64.c (aarch64_create_target_description): Likewise.
+ * arch/aarch64.h (aarch64_create_target_description): Likewise.
+ * features/Makefile: Add new files.
+ * features/aarch64-pauth.c: New file.
+ * features/aarch64-pauth.xml: New file.
+
2019-03-20 Tom Tromey <tromey@adacore.com>
* infrun.c (handle_inferior_event): Rename from
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
if (ret == 0)
return tdesc_arm_with_neon;
- else
- return aarch64_read_description (aarch64_sve_get_vq (tid));
+
+ /* pauth not yet supported. */
+ return aarch64_read_description (aarch64_sve_get_vq (tid), false);
}
/* Convert a native/host siginfo object, into/from the siginfo in the
if (target_auxv_search (target, AT_HWCAP, &aarch64_hwcap) != 1)
return NULL;
- return aarch64_read_description (aarch64_linux_core_read_vq (gdbarch, abfd));
+ /* pauth not yet supported. */
+ return aarch64_read_description (aarch64_linux_core_read_vq (gdbarch, abfd),
+ false);
}
/* Implementation of `gdbarch_stap_is_single_operand', as defined in
#define HA_MAX_NUM_FLDS 4
/* All possible aarch64 target descriptors. */
-struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1];
+struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/];
/* The standard register names, and all the valid aliases for them. */
static const struct
(It is not possible to set VQ to zero on an SVE system). */
const target_desc *
-aarch64_read_description (uint64_t vq)
+aarch64_read_description (uint64_t vq, bool pauth_p)
{
if (vq > AARCH64_MAX_SVE_VQ)
error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq,
AARCH64_MAX_SVE_VQ);
- struct target_desc *tdesc = tdesc_aarch64_list[vq];
+ struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p];
if (tdesc == NULL)
{
- tdesc = aarch64_create_target_description (vq);
- tdesc_aarch64_list[vq] = tdesc;
+ tdesc = aarch64_create_target_description (vq, pauth_p);
+ tdesc_aarch64_list[vq][pauth_p] = tdesc;
}
return tdesc;
/* Ensure we always have a target description. */
if (!tdesc_has_registers (tdesc))
- tdesc = aarch64_read_description (0);
+ tdesc = aarch64_read_description (0, false);
gdb_assert (tdesc);
feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.core");
selftests::register_test ("aarch64-process-record",
selftests::aarch64_process_record_test);
selftests::record_xml_tdesc ("aarch64.xml",
- aarch64_create_target_description (0));
+ aarch64_create_target_description (0, false));
#endif
}
}
};
-const target_desc *aarch64_read_description (uint64_t vq);
+const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p);
extern int aarch64_process_record (struct gdbarch *gdbarch,
struct regcache *regcache, CORE_ADDR addr);
#include "../features/aarch64-core.c"
#include "../features/aarch64-fpu.c"
#include "../features/aarch64-sve.c"
+#include "../features/aarch64-pauth.c"
/* See arch/aarch64.h. */
target_desc *
-aarch64_create_target_description (uint64_t vq)
+aarch64_create_target_description (uint64_t vq, bool pauth_p)
{
target_desc *tdesc = allocate_target_description ();
else
regnum = create_feature_aarch64_sve (tdesc, regnum, vq);
+ if (pauth_p)
+ regnum = create_feature_aarch64_pauth (tdesc, regnum);
+
return tdesc;
}
/* Create the aarch64 target description. A non zero VQ value indicates both
the presence of SVE and the Vector Quotient - the number of 128bit chunks in
- an SVE Z register. */
+ an SVE Z register. HAS_PAUTH_P indicates the presence of the PAUTH
+ feature. */
-target_desc *aarch64_create_target_description (uint64_t vq);
+target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p);
/* Register numbers of various important registers.
Note that on SVE, the Z registers reuse the V register numbers and the V
+2019-03-22 Alan Hayward <alan.hayward@arm.com>
+ Jiong Wang <jiong.wang@arm.com>
+
+ * gdb.texinfo (AArch64 Features): Describe pauth feature.
+
2019-03-20 Tom Tromey <tromey@adacore.com>
* python.texi (Selecting Pretty-Printers): Use @defvar for
it should contain registers @samp{z0} through @samp{z31}, @samp{p0}
through @samp{p15}, @samp{ffr} and @samp{vg}.
+The @samp{org.gnu.gdb.aarch64.pauth} feature is optional. If present,
+it should contain registers @samp{pauth_dmask} and @samp{pauth_cmask}.
+
@node ARC Features
@subsection ARC Features
@cindex target descriptions, ARC Features
FEATURE_XMLFILES = aarch64-core.xml \
aarch64-fpu.xml \
+ aarch64-pauth.xml \
i386/32bit-core.xml \
i386/32bit-sse.xml \
i386/32bit-linux.xml \
--- /dev/null
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: aarch64-pauth.xml */
+
+#include "common/tdesc.h"
+
+static int
+create_feature_aarch64_pauth (struct target_desc *result, long regnum)
+{
+ struct tdesc_feature *feature;
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.pauth");
+ tdesc_create_reg (feature, "pauth_dmask", regnum++, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "pauth_cmask", regnum++, 1, NULL, 64, "int");
+
+ return regnum;
+}
--- /dev/null
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.aarch64.pauth">
+ <reg name="pauth_dmask" bitsize="64"/>
+ <reg name="pauth_cmask" bitsize="64"/>
+</feature>
+
+2019-03-22 Alan Hayward <alan.hayward@arm.com>
+ Jiong Wang <jiong.wang@arm.com>
+
+ * linux-aarch64-ipa.c (get_ipa_tdesc): Add pauth param.
+ (initialize_low_tracepoint): Likewise.
+ * linux-aarch64-low.c (aarch64_arch_setup): Likewise.
+ * linux-aarch64-tdesc-selftest.c (aarch64_tdesc_test): Likewise.
+ * linux-aarch64-tdesc.c (struct target_desc): Likewise.
+ (aarch64_linux_read_description): Likewise.
+ * linux-aarch64-tdesc.h (aarch64_linux_read_description): Likewise.
+
2019-03-12 John Baldwin <jhb@FreeBSD.org>
* linux-x86-tdesc.c (i386_linux_read_description): Update call to
/* Return target_desc to use for IPA, given the tdesc index passed by
gdbserver. Index is ignored, since we have only one tdesc
- at the moment. SVE not yet supported. */
+ at the moment. SVE and pauth not yet supported. */
const struct target_desc *
get_ipa_tdesc (int idx)
{
- return aarch64_linux_read_description (0);
+ return aarch64_linux_read_description (0, false);
}
/* Allocate buffer for the jump pads. The branch instruction has a reach
void
initialize_low_tracepoint (void)
{
- /* SVE not yet supported. */
- aarch64_linux_read_description (0);
+ /* SVE and pauth not yet supported. */
+ aarch64_linux_read_description (0, false);
}
if (is_elf64)
{
uint64_t vq = aarch64_sve_get_vq (tid);
- current_process ()->tdesc = aarch64_linux_read_description (vq);
+ /* pauth not yet supported. */
+ current_process ()->tdesc = aarch64_linux_read_description (vq, false);
}
else
current_process ()->tdesc = tdesc_arm_with_neon;
static void
aarch64_tdesc_test ()
{
- const target_desc *tdesc = aarch64_linux_read_description (0);
+ const target_desc *tdesc = aarch64_linux_read_description (0, false);
SELF_CHECK (*tdesc == *tdesc_aarch64);
}
}
#include <inttypes.h>
/* All possible aarch64 target descriptors. */
-struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1];
+struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/];
/* Create the aarch64 target description. */
const target_desc *
-aarch64_linux_read_description (uint64_t vq)
+aarch64_linux_read_description (uint64_t vq, bool pauth_p)
{
if (vq > AARCH64_MAX_SVE_VQ)
error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq,
AARCH64_MAX_SVE_VQ);
- struct target_desc *tdesc = tdesc_aarch64_list[vq];
+ struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p];
if (tdesc == NULL)
{
- tdesc = aarch64_create_target_description (vq);
+ tdesc = aarch64_create_target_description (vq, pauth_p);
static const char *expedite_regs_aarch64[] = { "x29", "sp", "pc", NULL };
static const char *expedite_regs_aarch64_sve[] = { "x29", "sp", "pc",
else
init_target_desc (tdesc, expedite_regs_aarch64_sve);
- tdesc_aarch64_list[vq] = tdesc;
+ tdesc_aarch64_list[vq][pauth_p] = tdesc;
}
return tdesc;
#ifndef GDBSERVER_LINUX_AARCH64_TDESC_H
#define GDBSERVER_LINUX_AARCH64_TDESC_H
-const target_desc * aarch64_linux_read_description (uint64_t vq);
+const target_desc * aarch64_linux_read_description (uint64_t vq, bool pauth_p);
#if GDB_SELF_TEST
void initialize_low_tdesc ();
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