AArch64: fix one more place movi.2d could be created.
authorTim Northover <tnorthover@apple.com>
Wed, 20 Dec 2017 10:45:39 +0000 (10:45 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 20 Dec 2017 10:45:39 +0000 (10:45 +0000)
Somehow got missed out of r320965.

llvm-svn: 321162

llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

index 67138f4..2ff2ee3 100644 (file)
@@ -583,6 +583,20 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
   switch (MI->getOpcode()) {
   default:
     break;
+  case AArch64::MOVIv2d_ns:
+    // If the target has <rdar://problem/16473581>, lower this
+    // instruction to movi.16b instead.
+    if (STI->hasZeroCycleZeroingFPWorkaround() &&
+        MI->getOperand(1).getImm() == 0) {
+      MCInst TmpInst;
+      TmpInst.setOpcode(AArch64::MOVIv16b_ns);
+      TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
+      TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm()));
+      EmitToStreamer(*OutStreamer, TmpInst);
+      return;
+    }
+    break;
+
   case AArch64::DBG_VALUE: {
     if (isVerbose() && OutStreamer->hasRawTextSupport()) {
       SmallString<128> TmpStr;
index 453334d..2fb9d3b 100644 (file)
@@ -87,4 +87,13 @@ for.end:
   ret double %v0
 }
 
+define <2 x i64> @t6() {
+; ALL-LABEL: t6:
+; CYCLONE: movi.16b v0, #0
+; KRYO: movi v0.2d, #0000000000000000
+; FALKOR: movi v0.2d, #0000000000000000
+ ret <2 x i64> zeroinitializer
+}
+
+
 declare double @sin(double)