radv: pass num_patches to tes from tcs

TES needs num_patches to do some of the calculations.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 1b50b2c..a1f7a34 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -1170,7 +1170,7 @@ static LLVMValueRef calc_param_stride(struct radv_shader_context *ctx,
                else
                        param_stride = LLVMConstInt(ctx->ac.i32, ctx->tcs_num_patches, false);
        } else {
-               LLVMValueRef num_patches = ac_unpack_param(&ctx->ac, ctx->tcs_offchip_layout, 0, 9);
+               LLVMValueRef num_patches = LLVMConstInt(ctx->ac.i32, ctx->tcs_num_patches, false);
                LLVMValueRef vertices_per_patch = LLVMConstInt(ctx->ac.i32, ctx->tcs_vertices_per_patch, false);
                if (vertex_index)
                        param_stride = LLVMBuildMul(ctx->ac.builder, vertices_per_patch,
@@ -3109,6 +3109,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                        ctx.abi.load_tess_coord = load_tess_coord;
                        ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
                        ctx.tcs_vertices_per_patch = shaders[i]->info.tess.tcs_vertices_out;
+                       ctx.tcs_num_patches = ctx.options->key.tes.num_patches;
                } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
                        if (shader_info->info.vs.needs_instance_id) {
                                if (ctx.options->key.vs.as_ls) {
@@ -3176,6 +3177,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
                        shader_info->tcs.outputs_written = ctx.tess_outputs_written;
                        shader_info->tcs.patch_outputs_written = ctx.tess_patch_outputs_written;
+                       shader_info->tcs.num_patches = ctx.tcs_num_patches;
                        assert(ctx.tess_outputs_written == ctx.shader_info->info.tcs.outputs_written);
                        assert(ctx.tess_patch_outputs_written == ctx.shader_info->info.tcs.patch_outputs_written);
                } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX && ctx.options->key.vs.as_ls) {

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 641dc55..cc78245 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1785,6 +1785,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                                                                                              &code_sizes[MESA_SHADER_TESS_CTRL]);
                }
                modules[MESA_SHADER_VERTEX] = NULL;
+               keys[MESA_SHADER_TESS_EVAL].tes.num_patches = pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
        }
 
        if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_GEOMETRY]) {
@@ -1804,6 +1805,9 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                        if (i == MESA_SHADER_TESS_CTRL) {
                                keys[MESA_SHADER_TESS_CTRL].tcs.num_inputs = util_last_bit64(pipeline->shaders[MESA_SHADER_VERTEX]->info.info.vs.ls_outputs_written);
                        }
+                       if (i == MESA_SHADER_TESS_EVAL) {
+                               keys[MESA_SHADER_TESS_EVAL].tes.num_patches = pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
+                       }
                        pipeline->shaders[i] = radv_shader_variant_create(device, modules[i], &nir[i], 1,
                                                                          pipeline->layout,
                                                                          keys + i, &codes[i],

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 3726adb..984d335 100644 (file)
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -63,6 +63,7 @@ struct radv_vs_variant_key {
 struct radv_tes_variant_key {
        uint32_t as_es:1;
        uint32_t export_prim_id:1;
+       uint32_t num_patches;
 };
 
 struct radv_tcs_variant_key {
@@ -237,7 +238,7 @@ struct radv_shader_variant_info {
                        uint64_t outputs_written;
                        /* Which patch outputs are actually written */
                        uint32_t patch_outputs_written;
-
+                       uint32_t num_patches;
                } tcs;
                struct {
                        struct radv_vs_output_info outinfo;