Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 cleanups from Ingo Molnar:
 "Misc cleanups all around the map"

* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/CPU/AMD: Remove amd_get_topology_early()
  x86/tsc: Remove redundant assignment
  x86/crash: Use resource_size()
  x86/cpu: Add a missing prototype for arch_smt_update()
  x86/nospec: Remove unused RSB_FILL_LOOPS
  x86/vdso: Provide missing include file
  x86/Kconfig: Correct spelling and punctuation
  Documentation/x86/boot: Fix typo
  x86/boot: Fix a comment's incorrect file reference
  x86/process: Remove set but not used variables prev and next
  x86/Kconfig: Fix Kconfig indentation

diff --combined arch/x86/Kconfig
index 3d6c811,97956b5..42bc6fb
--- 1/arch/x86/Kconfig
--- 2/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@@ -96,7 -96,7 +96,7 @@@ config X8
        select ARCH_WANTS_DYNAMIC_TASK_STRUCT
        select ARCH_WANT_HUGE_PMD_SHARE
        select ARCH_WANTS_THP_SWAP              if X86_64
 -      select BUILDTIME_EXTABLE_SORT
 +      select BUILDTIME_TABLE_SORT
        select CLKEVT_I8253
        select CLOCKSOURCE_VALIDATE_LAST_CYCLE
        select CLOCKSOURCE_WATCHDOG
@@@ -124,7 -124,6 +124,7 @@@
        select GENERIC_STRNLEN_USER
        select GENERIC_TIME_VSYSCALL
        select GENERIC_GETTIMEOFDAY
 +      select GENERIC_VDSO_TIME_NS
        select GUP_GET_PTE_LOW_HIGH             if X86_PAE
        select HARDLOCKUP_CHECK_TIMESTAMP       if X86_64
        select HAVE_ACPI_APEI                   if ACPI
@@@ -440,8 -439,8 +440,8 @@@ config X86_MPPARS
          (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
  
  config GOLDFISH
-        def_bool y
-        depends on X86_GOLDFISH
+       def_bool y
+       depends on X86_GOLDFISH
  
  config RETPOLINE
        bool "Avoid speculative indirect branches in kernel"
@@@ -457,7 -456,6 +457,7 @@@ config X86_CPU_RESCTR
        bool "x86 CPU resource control support"
        depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
        select KERNFS
 +      select PROC_CPU_RESCTRL         if PROC_FS
        help
          Enable x86 CPU resource control support.
  
@@@ -479,7 -477,7 +479,7 @@@ config X86_BIGSM
        bool "Support for big SMP systems with more than 8 CPUs"
        depends on SMP
        ---help---
-         This option is needed for the systems that have more than 8 CPUs
+         This option is needed for the systems that have more than 8 CPUs.
  
  config X86_EXTENDED_PLATFORM
        bool "Support for extended (non-PC) x86 platforms"
@@@ -563,9 -561,9 +563,9 @@@ config X86_U
  # Please maintain the alphabetic order if and when there are additions
  
  config X86_GOLDFISH
-        bool "Goldfish (Virtual Platform)"
-        depends on X86_EXTENDED_PLATFORM
-        ---help---
+       bool "Goldfish (Virtual Platform)"
+       depends on X86_EXTENDED_PLATFORM
+       ---help---
         Enable support for the Goldfish virtual platform used primarily
         for Android development. Unless you are building for the Android
         Goldfish emulator say N here.
@@@ -808,9 -806,9 +808,9 @@@ config KVM_GUES
          timing infrastructure such as time of day, and system time
  
  config ARCH_CPUIDLE_HALTPOLL
-         def_bool n
-         prompt "Disable host haltpoll when loading haltpoll driver"
-         help
+       def_bool n
+       prompt "Disable host haltpoll when loading haltpoll driver"
+       help
          If virtualized under KVM, disable host haltpoll.
  
  config PVH
@@@ -889,16 -887,16 +889,16 @@@ config HPET_EMULATE_RT
        depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
  
  config APB_TIMER
-        def_bool y if X86_INTEL_MID
-        prompt "Intel MID APB Timer Support" if X86_INTEL_MID
-        select DW_APB_TIMER
-        depends on X86_INTEL_MID && SFI
-        help
-          APB timer is the replacement for 8254, HPET on X86 MID platforms.
-          The APBT provides a stable time base on SMP
-          systems, unlike the TSC, but it is more expensive to access,
-          as it is off-chip. APB timers are always running regardless of CPU
-          C states, they are used as per CPU clockevent device when possible.
+       def_bool y if X86_INTEL_MID
+       prompt "Intel MID APB Timer Support" if X86_INTEL_MID
+       select DW_APB_TIMER
+       depends on X86_INTEL_MID && SFI
+       help
+        APB timer is the replacement for 8254, HPET on X86 MID platforms.
+        The APBT provides a stable time base on SMP
+        systems, unlike the TSC, but it is more expensive to access,
+        as it is off-chip. APB timers are always running regardless of CPU
+        C states, they are used as per CPU clockevent device when possible.
  
  # Mark as expert because too many people got it wrong.
  # The code disables itself when not needed.
@@@ -1037,8 -1035,8 +1037,8 @@@ config SCHED_MC_PRI
          If unsure say Y here.
  
  config UP_LATE_INIT
-        def_bool y
-        depends on !SMP && X86_LOCAL_APIC
+       def_bool y
+       depends on !SMP && X86_LOCAL_APIC
  
  config X86_UP_APIC
        bool "Local APIC support on uniprocessors" if !PCI_MSI
@@@ -1187,8 -1185,8 +1187,8 @@@ config X86_LEGACY_VM8
          If unsure, say N here.
  
  config VM86
-        bool
-        default X86_LEGACY_VM86
+       bool
+       default X86_LEGACY_VM86
  
  config X86_16BIT
        bool "Enable support for 16-bit segments" if EXPERT
@@@ -1209,10 -1207,10 +1209,10 @@@ config X86_ESPFIX6
        depends on X86_16BIT && X86_64
  
  config X86_VSYSCALL_EMULATION
-        bool "Enable vsyscall emulation" if EXPERT
-        default y
-        depends on X86_64
-        ---help---
+       bool "Enable vsyscall emulation" if EXPERT
+       default y
+       depends on X86_64
+       ---help---
         This enables emulation of the legacy vsyscall page.  Disabling
         it is roughly equivalent to booting with vsyscall=none, except
         that it will also disable the helpful warning if a program
@@@ -1514,7 -1512,7 +1514,7 @@@ config X86_CPA_STATISTIC
        bool "Enable statistic for Change Page Attribute"
        depends on DEBUG_FS
        ---help---
 -        Expose statistics about the Change Page Attribute mechanims, which
 +        Expose statistics about the Change Page Attribute mechanism, which
          helps to determine the effectiveness of preserving large and huge
          page mappings when mapping protections are changed.
  
@@@ -1545,12 -1543,12 +1545,12 @@@ config AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAUL
  
  # Common NUMA Features
  config NUMA
-       bool "Numa Memory Allocation and Scheduler Support"
+       bool "NUMA Memory Allocation and Scheduler Support"
        depends on SMP
        depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP)
        default y if X86_BIGSMP
        ---help---
-         Enable NUMA (Non Uniform Memory Access) support.
+         Enable NUMA (Non-Uniform Memory Access) support.
  
          The kernel will try to allocate memory used by a CPU on the
          local memory controller of the CPU and add some more
@@@ -1650,9 -1648,9 +1650,9 @@@ config ARCH_PROC_KCORE_TEX
        depends on X86_64 && PROC_KCORE
  
  config ILLEGAL_POINTER_VALUE
-        hex
-        default 0 if X86_32
-        default 0xdead000000000000 if X86_64
+       hex
+       default 0 if X86_32
+       default 0xdead000000000000 if X86_64
  
  config X86_PMEM_LEGACY_DEVICE
        bool
@@@ -1995,7 -1993,6 +1995,7 @@@ config EF
  config EFI_STUB
        bool "EFI stub support"
        depends on EFI && !X86_USE_3DNOW
 +      depends on $(cc-option,-mabi=ms) || X86_32
        select RELOCATABLE
        ---help---
          This kernel feature allows a bzImage to be loaded directly

diff --combined arch/x86/kernel/cpu/amd.c
index 62c3027,8a88d3f..ac83a0f
--- 1/arch/x86/kernel/cpu/amd.c
--- 2/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@@ -319,13 -319,6 +319,6 @@@ static void legacy_fixup_core_id(struc
        c->cpu_core_id %= cus_per_node;
  }
  
- 
- static void amd_get_topology_early(struct cpuinfo_x86 *c)
- {
-       if (cpu_has(c, X86_FEATURE_TOPOEXT))
-               smp_num_siblings = ((cpuid_ebx(0x8000001e) >> 8) & 0xff) + 1;
- }
- 
  /*
   * Fixup core topology information for
   * (1) AMD multi-node processors
@@@ -615,9 -608,9 +608,9 @@@ static void early_detect_mem_encrypt(st
                return;
  
  clear_all:
 -              clear_cpu_cap(c, X86_FEATURE_SME);
 +              setup_clear_cpu_cap(X86_FEATURE_SME);
  clear_sev:
 -              clear_cpu_cap(c, X86_FEATURE_SEV);
 +              setup_clear_cpu_cap(X86_FEATURE_SEV);
        }
  }
  
@@@ -717,7 -710,8 +710,8 @@@ static void early_init_amd(struct cpuin
                }
        }
  
-       amd_get_topology_early(c);
+       if (cpu_has(c, X86_FEATURE_TOPOEXT))
+               smp_num_siblings = ((cpuid_ebx(0x8000001e) >> 8) & 0xff) + 1;
  }
  
  static void init_amd_k8(struct cpuinfo_x86 *c)

diff --combined arch/x86/kernel/cpu/common.c
index ffb869f,6b95f18..745c401
--- 1/arch/x86/kernel/cpu/common.c
--- 2/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@@ -14,6 -14,7 +14,7 @@@
  #include <linux/sched/mm.h>
  #include <linux/sched/clock.h>
  #include <linux/sched/task.h>
+ #include <linux/sched/smt.h>
  #include <linux/init.h>
  #include <linux/kprobes.h>
  #include <linux/kgdb.h>
@@@ -49,7 -50,7 +50,7 @@@
  #include <asm/cpu.h>
  #include <asm/mce.h>
  #include <asm/msr.h>
 -#include <asm/pat.h>
 +#include <asm/memtype.h>
  #include <asm/microcode.h>
  #include <asm/microcode_intel.h>
  #include <asm/intel-family.h>
@@@ -1023,7 -1024,6 +1024,7 @@@ static void identify_cpu_without_cpuid(
  #define MSBDS_ONLY            BIT(5)
  #define NO_SWAPGS             BIT(6)
  #define NO_ITLB_MULTIHIT      BIT(7)
 +#define NO_SPECTRE_V2         BIT(8)
  
  #define VULNWL(_vendor, _family, _model, _whitelist)  \
        { X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
@@@ -1085,10 -1085,6 +1086,10 @@@ static const __initconst struct x86_cpu
        /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
        VULNWL_AMD(X86_FAMILY_ANY,      NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
        VULNWL_HYGON(X86_FAMILY_ANY,    NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
 +
 +      /* Zhaoxin Family 7 */
 +      VULNWL(CENTAUR, 7, X86_MODEL_ANY,       NO_SPECTRE_V2 | NO_SWAPGS),
 +      VULNWL(ZHAOXIN, 7, X86_MODEL_ANY,       NO_SPECTRE_V2 | NO_SWAPGS),
        {}
  };
  
@@@ -1121,9 -1117,7 +1122,9 @@@ static void __init cpu_set_bug_bits(str
                return;
  
        setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
 -      setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
 +
 +      if (!cpu_matches(NO_SPECTRE_V2))
 +              setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
  
        if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) &&
           !cpu_has(c, X86_FEATURE_AMD_SSB_NO))