* mips-tdep.c (mips_eabi_push_dummy_call): When pushing floating

	point arguments, test explicitly for use of the EABI32 ABI
	instead of inferring this condition from tests on register
	sizes.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 188bed3..754592e 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,12 @@
 2007-05-03  Kevin Buettner  <kevinb@redhat.com>
 
+       * mips-tdep.c (mips_eabi_push_dummy_call): When pushing floating
+       point arguments, test explicitly for use of the EABI32 ABI
+       instead of inferring this condition from tests on register
+       sizes.
+
+2007-05-03  Kevin Buettner  <kevinb@redhat.com>
+
        * breakpoint.c (set_raw_breakpoint): Adjust breakpoint's address
        prior to allocating its location.
 

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index d53b602..a291aa5 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -2507,7 +2507,12 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
       if (fp_register_arg_p (typecode, arg_type)
          && float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
        {
-         if (register_size (gdbarch, float_argreg) < 8 && len == 8)
+         /* EABI32 will pass doubles in consecutive registers, even on
+            64-bit cores.  At one time, we used to check the size of
+            `float_argreg' to determine whether or not to pass doubles
+            in consecutive registers, but this is not sufficient for
+            making the ABI determination.  */
+         if (len == 8 && mips_abi (gdbarch) == MIPS_ABI_EABI32)
            {
              int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
              unsigned long regval;