drm/amdgpu: Modify hdp block to fit for the unified ras block data and ops
authoryipechai <YiPeng.Chai@amd.com>
Tue, 4 Jan 2022 10:57:58 +0000 (18:57 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Jan 2022 22:51:59 +0000 (17:51 -0500)
1.Modify hdp block to fit for the unified ras block data and ops.
2.Change amdgpu_hdp_ras_funcs to amdgpu_hdp_ras, and the corresponding variable name remove _funcs suffix.
3.Remove the const flag of hdp ras variable so that hdp ras block can be able to be inserted into amdgpu device ras block link list.
4.Invoke amdgpu_ras_register_ras_block function to register hdp ras block into amdgpu device ras block link list.
5.Remove the redundant code about hdp in amdgpu_ras.c after using the unified ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h

index d86ee53..58cc4da 100644 (file)
@@ -465,9 +465,8 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
                        return r;
        }
 
-       if (adev->hdp.ras_funcs &&
-           adev->hdp.ras_funcs->ras_late_init) {
-               r = adev->hdp.ras_funcs->ras_late_init(adev);
+       if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_late_init) {
+               r = adev->hdp.ras->ras_block.ras_late_init(adev, NULL);
                if (r)
                        return r;
        }
@@ -509,9 +508,8 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
        if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
                adev->gmc.xgmi.ras->ras_block.ras_fini(adev);
 
-       if (adev->hdp.ras_funcs &&
-           adev->hdp.ras_funcs->ras_fini)
-               adev->hdp.ras_funcs->ras_fini(adev);
+       if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
+               adev->hdp.ras->ras_block.ras_fini(adev);
 }
 
        /*
index a766e1a..518966a 100644 (file)
@@ -24,7 +24,7 @@
 #include "amdgpu.h"
 #include "amdgpu_ras.h"
 
-int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev)
+int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info)
 {
        int r;
        struct ras_ih_if ih_info = {
index 7ec99d5..c94a4b3 100644 (file)
  */
 #ifndef __AMDGPU_HDP_H__
 #define __AMDGPU_HDP_H__
+#include "amdgpu_ras.h"
 
-struct amdgpu_hdp_ras_funcs {
-       int (*ras_late_init)(struct amdgpu_device *adev);
-       void (*ras_fini)(struct amdgpu_device *adev);
-       void (*query_ras_error_count)(struct amdgpu_device *adev,
-                                     void *ras_error_status);
-       void (*reset_ras_error_count)(struct amdgpu_device *adev);
+struct amdgpu_hdp_ras{
+       struct amdgpu_ras_block_object ras_block;
 };
 
 struct amdgpu_hdp_funcs {
@@ -43,9 +40,9 @@ struct amdgpu_hdp_funcs {
 struct amdgpu_hdp {
        struct ras_common_if                    *ras_if;
        const struct amdgpu_hdp_funcs           *funcs;
-       const struct amdgpu_hdp_ras_funcs       *ras_funcs;
+       struct amdgpu_hdp_ras   *ras;
 };
 
-int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev);
+int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
 void amdgpu_hdp_ras_fini(struct amdgpu_device *adev);
 #endif /* __AMDGPU_HDP_H__ */
index 28997b7..c47a032 100644 (file)
@@ -1012,6 +1012,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
                        adev->nbio.ras_funcs->query_ras_error_count(adev, &err_data);
                break;
        case AMDGPU_RAS_BLOCK__XGMI_WAFL:
+       case AMDGPU_RAS_BLOCK__HDP:
                if (!block_obj || !block_obj->hw_ops)   {
                        dev_info(adev->dev, "%s doesn't config ras function \n",
                                get_ras_block_str(&info->head));
@@ -1020,11 +1021,6 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
                if (block_obj->hw_ops->query_ras_error_count)
                        block_obj->hw_ops->query_ras_error_count(adev, &err_data);
                break;
-       case AMDGPU_RAS_BLOCK__HDP:
-               if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->query_ras_error_count)
-                       adev->hdp.ras_funcs->query_ras_error_count(adev, &err_data);
-               break;
        case AMDGPU_RAS_BLOCK__MCA:
                amdgpu_ras_mca_query_error_status(adev, &info->head, &err_data);
                break;
@@ -1118,9 +1114,13 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
                        adev->sdma.funcs->reset_ras_error_count(adev);
                break;
        case AMDGPU_RAS_BLOCK__HDP:
-               if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->reset_ras_error_count)
-                       adev->hdp.ras_funcs->reset_ras_error_count(adev);
+               if (!block_obj || !block_obj->hw_ops)   {
+                       dev_info(adev->dev, "%s doesn't config ras function \n", ras_block_str(block));
+                       return -EINVAL;
+               }
+
+               if (block_obj->hw_ops->reset_ras_error_count)
+                       block_obj->hw_ops->reset_ras_error_count(adev);
                break;
        default:
                break;
index 88c1eb9..16ab572 100644 (file)
@@ -1269,7 +1269,8 @@ static void gmc_v9_0_set_gfxhub_funcs(struct amdgpu_device *adev)
 
 static void gmc_v9_0_set_hdp_ras_funcs(struct amdgpu_device *adev)
 {
-       adev->hdp.ras_funcs = &hdp_v4_0_ras_funcs;
+       adev->hdp.ras = &hdp_v4_0_ras;
+       amdgpu_ras_register_ras_block(adev, &adev->hdp.ras->ras_block);
 }
 
 static void gmc_v9_0_set_mca_funcs(struct amdgpu_device *adev)
@@ -1346,9 +1347,9 @@ static int gmc_v9_0_late_init(void *handle)
                    adev->mmhub.ras_funcs->reset_ras_error_count)
                        adev->mmhub.ras_funcs->reset_ras_error_count(adev);
 
-               if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->reset_ras_error_count)
-                       adev->hdp.ras_funcs->reset_ras_error_count(adev);
+               if (adev->hdp.ras && adev->hdp.ras->ras_block.hw_ops &&
+                   adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count)
+                       adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count(adev);
        }
 
        r = amdgpu_gmc_ras_late_init(adev);
index eecfb15..6b41fcb 100644 (file)
@@ -150,13 +150,21 @@ static void hdp_v4_0_init_registers(struct amdgpu_device *adev)
        WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
 }
 
-const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs = {
-       .ras_late_init = amdgpu_hdp_ras_late_init,
-       .ras_fini = amdgpu_hdp_ras_fini,
+struct amdgpu_ras_block_hw_ops hdp_v4_0_ras_hw_ops = {
        .query_ras_error_count = hdp_v4_0_query_ras_error_count,
        .reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
 };
 
+struct amdgpu_hdp_ras hdp_v4_0_ras = {
+       .ras_block = {
+               .name = "hdp",
+               .block = AMDGPU_RAS_BLOCK__HDP,
+               .hw_ops = &hdp_v4_0_ras_hw_ops,
+               .ras_late_init = amdgpu_hdp_ras_late_init,
+               .ras_fini = amdgpu_hdp_ras_fini,
+       },
+};
+
 const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {
        .flush_hdp = hdp_v4_0_flush_hdp,
        .invalidate_hdp = hdp_v4_0_invalidate_hdp,
index dc3a1b8..c44eee9 100644 (file)
@@ -27,6 +27,6 @@
 #include "soc15_common.h"
 
 extern const struct amdgpu_hdp_funcs hdp_v4_0_funcs;
-extern const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs;
+extern struct amdgpu_hdp_ras  hdp_v4_0_ras;
 
 #endif