int ret = 0;
if (!cpu_dai->active) {
- clk_enable(ssp->clk);
+ clk_prepare_enable(ssp->clk);
pxa_ssp_disable(ssp);
}
if (!cpu_dai->active) {
pxa_ssp_disable(ssp);
- clk_disable(ssp->clk);
+ clk_disable_unprepare(ssp->clk);
}
kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
struct ssp_device *ssp = priv->ssp;
if (!cpu_dai->active)
- clk_enable(ssp->clk);
+ clk_prepare_enable(ssp->clk);
priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
pxa_ssp_disable(ssp);
- clk_disable(ssp->clk);
+ clk_disable_unprepare(ssp->clk);
return 0;
}
struct ssp_device *ssp = priv->ssp;
uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
- clk_enable(ssp->clk);
+ clk_prepare_enable(ssp->clk);
__raw_writel(sssr, ssp->mmio_base + SSSR);
__raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
if (cpu_dai->active)
pxa_ssp_enable(ssp);
else
- clk_disable(ssp->clk);
+ clk_disable_unprepare(ssp->clk);
return 0;
}
/* The SSP clock must be disabled when changing SSP clock mode
* on PXA2xx. On PXA3xx it must be enabled when doing so. */
if (ssp->type != PXA3xx_SSP)
- clk_disable(ssp->clk);
+ clk_disable_unprepare(ssp->clk);
val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
pxa_ssp_write_reg(ssp, SSCR0, val);
if (ssp->type != PXA3xx_SSP)
- clk_enable(ssp->clk);
+ clk_prepare_enable(ssp->clk);
return 0;
}