layout->push_constants.size);
}
- if (layout->push_constants.size)
- layout->push_constants.ubo_idx = ubo_idx++;
-
layout->num_samplers = sampler_idx;
layout->num_textures = tex_idx;
layout->num_ubos = ubo_idx;
#define NUM_DEPTH_CLEAR_PIPELINES 3
+#define PANVK_SYSVAL_UBO_INDEX 0
+#define PANVK_PUSH_CONST_UBO_INDEX 1
+#define PANVK_NUM_BUILTIN_UBOS 2
+
#define panvk_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
void
struct {
uint32_t size;
- unsigned ubo_idx;
} push_constants;
struct {
{
struct mali_uniform_buffer_packed *ubos = descs;
+ panvk_per_arch(emit_ubo)(state->sysvals_ptr,
+ sizeof(state->sysvals),
+ &ubos[PANVK_SYSVAL_UBO_INDEX]);
+
+ if (pipeline->layout->push_constants.size) {
+ panvk_per_arch(emit_ubo)(state->push_constants,
+ ALIGN_POT(pipeline->layout->push_constants.size, 16),
+ &ubos[PANVK_PUSH_CONST_UBO_INDEX]);
+ } else {
+ memset(&ubos[PANVK_PUSH_CONST_UBO_INDEX], 0, sizeof(*ubos));
+ }
+
for (unsigned i = 0; i < ARRAY_SIZE(state->sets); i++) {
const struct panvk_descriptor_set_layout *set_layout =
pipeline->layout->sets[i].layout;
const struct panvk_descriptor_set *set = state->sets[i];
- unsigned offset = pipeline->layout->sets[i].ubo_offset;
+ unsigned offset = PANVK_NUM_BUILTIN_UBOS +
+ pipeline->layout->sets[i].ubo_offset;
if (!set_layout)
continue;
}
}
- unsigned offset = pipeline->layout->num_ubos;
+ unsigned offset = PANVK_NUM_BUILTIN_UBOS + pipeline->layout->num_ubos;
for (unsigned i = 0; i < pipeline->layout->num_dyn_ubos; i++) {
const struct panvk_buffer_desc *bdesc = &state->dyn.ubos[i];
mali_ptr address = panvk_buffer_gpu_ptr(bdesc->buffer, bdesc->offset);
else
memset(&ubos[offset + i], 0, sizeof(*ubos));
}
-
- for (unsigned i = 0; i < ARRAY_SIZE(pipeline->sysvals); i++) {
- panvk_per_arch(emit_ubo)(state->sysvals_ptr,
- sizeof(state->sysvals),
- &ubos[pipeline->sysvals[i].ubo_idx]);
- }
-
- if (pipeline->layout->push_constants.size) {
- panvk_per_arch(emit_ubo)(state->push_constants,
- ALIGN_POT(pipeline->layout->push_constants.size, 16),
- &ubos[pipeline->layout->push_constants.ubo_idx]);
- }
}
void
switch (binding_layout->type) {
case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
- base = binding_layout->ubo_idx + ctx->layout->sets[set].ubo_offset;
+ base = PANVK_NUM_BUILTIN_UBOS +
+ ctx->layout->sets[set].ubo_offset +
+ binding_layout->ubo_idx;
break;
case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
- base = binding_layout->dyn_ubo_idx + ctx->layout->num_ubos +
- ctx->layout->sets[set].dyn_ubo_offset;
+ base = PANVK_NUM_BUILTIN_UBOS +
+ ctx->layout->sets[set].dyn_ubo_offset +
+ ctx->layout->num_ubos +
+ binding_layout->dyn_ubo_idx;
break;
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
base = binding_layout->ssbo_idx + ctx->layout->sets[set].ssbo_offset;
}
/* compile shaders in reverse order */
- unsigned sysval_ubo = builder->layout->num_ubos + builder->layout->num_dyn_ubos;
-
for (gl_shader_stage stage = MESA_SHADER_STAGES - 1;
stage > MESA_SHADER_NONE; stage--) {
const VkPipelineShaderStageCreateInfo *stage_info = stage_infos[stage];
struct panvk_shader *shader;
shader = panvk_per_arch(shader_create)(builder->device, stage, stage_info,
- builder->layout, sysval_ubo,
+ builder->layout,
+ PANVK_SYSVAL_UBO_INDEX,
&pipeline->blend.state,
panvk_pipeline_static_state(pipeline,
VK_DYNAMIC_STATE_BLEND_CONSTANTS),
builder->alloc);
if (!shader)
return VK_ERROR_OUT_OF_HOST_MEMORY;
-
- if (shader->info.sysvals.sysval_count)
- sysval_ubo++;
builder->shaders[stage] = shader;
builder->shader_total_size = ALIGN_POT(builder->shader_total_size, 128);
}
}
- pipeline->num_ubos = builder->layout->num_ubos + builder->layout->num_dyn_ubos;
- for (unsigned i = 0; i < ARRAY_SIZE(pipeline->sysvals); i++) {
- if (pipeline->sysvals[i].ids.sysval_count)
- pipeline->num_ubos = MAX2(pipeline->num_ubos, pipeline->sysvals[i].ubo_idx + 1);
- }
+ pipeline->num_ubos = PANVK_NUM_BUILTIN_UBOS +
+ builder->layout->num_ubos +
+ builder->layout->num_dyn_ubos;
}
if (intr->intrinsic != nir_intrinsic_load_push_constant)
return false;
- const struct panvk_pipeline_layout *layout = data;
-
b->cursor = nir_before_instr(instr);
nir_ssa_def *ubo_load =
nir_load_ubo(b, nir_dest_num_components(intr->dest),
nir_dest_bit_size(intr->dest),
- nir_imm_int(b, layout->push_constants.ubo_idx),
+ nir_imm_int(b, PANVK_PUSH_CONST_UBO_INDEX),
intr->src[0].ssa,
.align_mul = nir_dest_bit_size(intr->dest) / 8,
.align_offset = 0,
sizeof(fixed_sysvals)) == 0);
/* Patch the descriptor count */
- shader->info.ubo_count =
- shader->info.sysvals.sysval_count ? sysval_ubo + 1 : layout->num_ubos;
+ shader->info.ubo_count = PANVK_NUM_BUILTIN_UBOS +
+ layout->num_ubos + layout->num_dyn_ubos;
shader->info.sampler_count = layout->num_samplers;
shader->info.texture_count = layout->num_textures;
if (shader->has_img_access)