net: hisilicon: updates HNS config and documents
authoryankejian <yankejian@huawei.com>
Tue, 27 Oct 2015 11:16:34 +0000 (19:16 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 28 Oct 2015 03:20:24 +0000 (20:20 -0700)
updates the bindings documents and dtsi file according to the review
comments[https://lkml.org/lkml/2015/9/21/670] from Rob Herring <robh@kernel.org>

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: yankejian <yankejian@huawei.com>
Signed-off-by: huangdaode <huangdaode@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/net/hisilicon-hns-mdio.txt
arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi

index 9940aa0..9c23fdf 100644 (file)
@@ -12,7 +12,7 @@ Example:
          mdio@803c0000 {
                    #address-cells = <1>;
                    #size-cells = <0>;
-                   compatible = "hisilicon,mdio","hisilicon,hns-mdio";
+                   compatible = "hisilicon,hns-mdio","hisilicon,mdio";
                    reg = <0x0 0x803c0000 0x0 0x10000>;
 
                    ethernet-phy@0 {
index 3500586..606dd5a 100644 (file)
@@ -13,14 +13,12 @@ soc0: soc@000000000 {
                reg = <0x0 0x803c0000 0x0 0x10000
                       0x0 0x80000000 0x0 0x10000>;
 
-               soc0_phy4: ethernet-phy@4 {
+               soc0_phy0: ethernet-phy@0 {
                        reg = <0x0>;
-                       device_type = "ethernet-phy";
                        compatible = "ethernet-phy-ieee802.3-c22";
                };
-               soc0_phy5: ethernet-phy@5 {
+               soc0_phy1: ethernet-phy@1 {
                        reg = <0x1>;
-                       device_type = "ethernet-phy";
                        compatible = "ethernet-phy-ieee802.3-c22";
                };
        };
@@ -37,7 +35,7 @@ soc0: soc@000000000 {
                       0x0 0xc7000000 0x0 0x60000
                       >;
 
-               phy-handle = <0 0 0 0 &soc0_phy4 &soc0_phy5 0 0>;
+               phy-handle = <0 0 0 0 &soc0_phy0 &soc0_phy1 0 0>;
                interrupts = <
                        /* [14] ge fifo err 8 / xge 6**/
                        149 0x4 150 0x4 151 0x4 152 0x4