CodeGen: Make RegAllocRegistry a template class

Will allow re-using the machinery for independent
sets of register allocators.

This will allow AMDGPU to use separate command line
options for the allocator to use for SGPRs separate
from VGPRs.

llvm-svn: 354687

diff --git a/llvm/include/llvm/CodeGen/RegAllocRegistry.h b/llvm/include/llvm/CodeGen/RegAllocRegistry.h
index 7077aa30450ba7cc51281fa0072385b9062a8317..9a63674689b30167e7bc70502628ff69b873a290 100644 (file)
--- a/llvm/include/llvm/CodeGen/RegAllocRegistry.h
+++ b/llvm/include/llvm/CodeGen/RegAllocRegistry.h
@@ -22,29 +22,30 @@ class FunctionPass;
 
 //===----------------------------------------------------------------------===//
 ///
-/// RegisterRegAlloc class - Track the registration of register allocators.
+/// RegisterRegAllocBase class - Track the registration of register allocators.
 ///
 //===----------------------------------------------------------------------===//
-class RegisterRegAlloc : public MachinePassRegistryNode<FunctionPass *(*)()> {
+template <class SubClass>
+class RegisterRegAllocBase : public MachinePassRegistryNode<FunctionPass *(*)()> {
 public:
   using FunctionPassCtor = FunctionPass *(*)();
 
   static MachinePassRegistry<FunctionPassCtor> Registry;
 
-  RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
+  RegisterRegAllocBase(const char *N, const char *D, FunctionPassCtor C)
       : MachinePassRegistryNode(N, D, C) {
     Registry.Add(this);
   }
 
-  ~RegisterRegAlloc() { Registry.Remove(this); }
+  ~RegisterRegAllocBase() { Registry.Remove(this); }
 
   // Accessors.
-  RegisterRegAlloc *getNext() const {
-    return (RegisterRegAlloc *)MachinePassRegistryNode::getNext();
+  SubClass *getNext() const {
+    return static_cast<SubClass *>(MachinePassRegistryNode::getNext());
   }
 
-  static RegisterRegAlloc *getList() {
-    return (RegisterRegAlloc *)Registry.getList();
+  static SubClass *getList() {
+    return static_cast<SubClass *>(Registry.getList());
   }
 
   static FunctionPassCtor getDefault() { return Registry.getDefault(); }
@@ -56,6 +57,17 @@ public:
   }
 };
 
+class RegisterRegAlloc : public RegisterRegAllocBase<RegisterRegAlloc> {
+public:
+  RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
+    : RegisterRegAllocBase(N, D, C) {}
+};
+
+/// RegisterRegAlloc's global Registry tracks allocator registration.
+template <class T>
+MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
+RegisterRegAllocBase<T>::Registry;
+
 } // end namespace llvm
 
 #endif // LLVM_CODEGEN_REGALLOCREGISTRY_H

diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index 85c0011911412e484e7403ea6091a66f39c3113c..399f69680af496a70ac0a5941d18c5878718ccb6 100644 (file)
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -1038,10 +1038,6 @@ bool TargetPassConfig::getOptimizeRegAlloc() const {
   llvm_unreachable("Invalid optimize-regalloc state");
 }
 
-/// RegisterRegAlloc's global Registry tracks allocator registration.
-MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
-    RegisterRegAlloc::Registry;
-
 /// A dummy default pass factory indicates whether the register allocator is
 /// overridden on the command line.
 static llvm::once_flag InitializeDefaultRegisterAllocatorFlag;