ARM: dts: imx: align name for crypto node and child nodes
authorHoria Geantă <horia.geanta@nxp.com>
Thu, 5 Mar 2020 13:59:08 +0000 (15:59 +0200)
committerShawn Guo <shawnguo@kernel.org>
Wed, 11 Mar 2020 08:53:01 +0000 (16:53 +0800)
crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").

Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx23.dtsi
arch/arm/boot/dts/imx27.dtsi
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl.dtsi
arch/arm/boot/dts/imx6sll.dtsi
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/boot/dts/imx7s.dtsi
arch/arm/boot/dts/imx7ulp.dtsi

index 8257630..eb0aeda 100644 (file)
                                clocks = <&clks 16>;
                        };
 
-                       dcp@80028000 {
+                       dcp: crypto@80028000 {
                                compatible = "fsl,imx23-dcp";
                                reg = <0x80028000 0x2000>;
                                interrupts = <53 54>;
index f3464cf..002cd22 100644 (file)
                                reg = <0x10024600 0x200>;
                        };
 
-                       sahara2: sahara@10025000 {
+                       sahara2: crypto@10025000 {
                                compatible = "fsl,imx27-sahara";
                                reg = <0x10025000 0x1000>;
                                interrupts = <59>;
index e14d8ef..a1cbbeb 100644 (file)
                                clocks = <&clks 26>;
                        };
 
-                       dcp: dcp@80028000 {
+                       dcp: crypto@80028000 {
                                compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
                                reg = <0x80028000 0x2000>;
                                interrupts = <52 53 54>;
index 8baad74..33efe7e 100644 (file)
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       crypto: caam@2100000 {
+                       crypto: crypto@2100000 {
                                compatible = "fsl,sec-v4.0";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                         <&clks IMX6QDL_CLK_EIM_SLOW>;
                                clock-names = "mem", "aclk", "ipg", "emi_slow";
 
-                               sec_jr0: jr0@1000 {
+                               sec_jr0: jr@1000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x1000 0x1000>;
                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr1: jr1@2000 {
+                               sec_jr1: jr@2000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x2000 0x1000>;
                                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
index 0359902..c6141ed 100644 (file)
                                power-domains = <&pd_disp>;
                        };
 
-                       dcp: dcp@20fc000 {
+                       dcp: crypto@20fc000 {
                                compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
                                reg = <0x020fc000 0x4000>;
                                interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
index 797f850..e8e0fb3 100644 (file)
                                status = "disabled";
                        };
 
-                       dcp: dcp@20fc000 {
+                       dcp: crypto@20fc000 {
                                compatible = "fsl,imx28-dcp";
                                reg = <0x020fc000 0x4000>;
                                interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
index 43e36e1..c48ef39 100644 (file)
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       crypto: caam@2100000 {
+                       crypto: crypto@2100000 {
                                compatible = "fsl,sec-v4.0";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                         <&clks IMX6SX_CLK_EIM_SLOW>;
                                clock-names = "mem", "aclk", "ipg", "emi_slow";
 
-                               sec_jr0: jr0@1000 {
+                               sec_jr0: jr@1000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x1000 0x1000>;
                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr1: jr1@2000 {
+                               sec_jr1: jr@2000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x2000 0x1000>;
                                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
index c53898b..2ccf67c 100644 (file)
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       crypto: caam@2140000 {
+                       crypto: crypto@2140000 {
                                compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                         <&clks IMX6UL_CLK_CAAM_MEM>;
                                clock-names = "ipg", "aclk", "mem";
 
-                               sec_jr0: jr0@1000 {
+                               sec_jr0: jr@1000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x1000 0x1000>;
                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr1: jr1@2000 {
+                               sec_jr1: jr@2000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x2000 0x1000>;
                                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr2: jr2@3000 {
+                               sec_jr2: jr@3000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x3000 0x1000>;
                                        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
index 05da999..76e3ffb 100644 (file)
                                };
                        };
 
-                       crypto: caam@30900000 {
+                       crypto: crypto@30900000 {
                                compatible = "fsl,sec-v4.0";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                         <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
                                clock-names = "ipg", "aclk";
 
-                               sec_jr0: jr0@1000 {
+                               sec_jr0: jr@1000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x1000 0x1000>;
                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr1: jr1@2000 {
+                               sec_jr1: jr@2000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x2000 0x1000>;
                                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                                };
 
-                               sec_jr2: jr1@3000 {
+                               sec_jr2: jr@3000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x3000 0x1000>;
                                        interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
index ab91c98..f7c4878 100644 (file)
                                 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
                        clock-names = "aclk", "ipg";
 
-                       sec_jr0: jr0@1000 {
+                       sec_jr0: jr@1000 {
                                compatible = "fsl,sec-v4.0-job-ring";
                                reg = <0x1000 0x1000>;
                                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       sec_jr1: jr1@2000 {
+                       sec_jr1: jr@2000 {
                                compatible = "fsl,sec-v4.0-job-ring";
                                reg = <0x2000 0x1000>;
                                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;