arm64: dts: mediatek: mt8195-demo: update and reorder reserved memory regions
authorMacpaul Lin <macpaul.lin@mediatek.com>
Tue, 3 Oct 2023 11:13:45 +0000 (13:13 +0200)
committerArnd Bergmann <arnd@arndb.de>
Fri, 6 Oct 2023 20:45:57 +0000 (22:45 +0200)
The dts file of the MediaTek MT8195 demo board has been updated to include
new reserved memory regions.
These reserved memory regions are:
 - SCP
 - VPU,
 - Sound DMA
 - APU.

These regions are defined with the "shared-dma-pool" compatible property.
In addition, the existing reserved memory regions have been reordered by
their addresses to improve readability and maintainability of the DTS
file.

Cc: stable@vger.kernel.org # 6.1, 6.4, 6.5
Fixes: e4a417520101 ("arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230905034511.11232-2-macpaul.lin@mediatek.com
Link: https://lore.kernel.org/r/20231003-mediatek-fixes-v6-7-v1-3-dad7cd62a8ff@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm64/boot/dts/mediatek/mt8195-demo.dts

index ff363ab..5d63508 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
-               bl31_secmon_reserved: secmon@54600000 {
-                       no-map;
-                       reg = <0 0x54600000 0x0 0x200000>;
-               };
-
-               /* 12 MiB reserved for OP-TEE (BL32)
+               /*
+                * 12 MiB reserved for OP-TEE (BL32)
                 * +-----------------------+ 0x43e0_0000
                 * |      SHMEM 2MiB       |
                 * +-----------------------+ 0x43c0_0000
                        no-map;
                        reg = <0 0x43200000 0 0x00c00000>;
                };
+
+               scp_mem: memory@50000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x50000000 0 0x2900000>;
+                       no-map;
+               };
+
+               vpu_mem: memory@53000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x53000000 0 0x1400000>; /* 20 MB */
+               };
+
+               /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
+               bl31_secmon_mem: memory@54600000 {
+                       no-map;
+                       reg = <0 0x54600000 0x0 0x200000>;
+               };
+
+               snd_dma_mem: memory@60000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x60000000 0 0x1100000>;
+                       no-map;
+               };
+
+               apu_mem: memory@62000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x62000000 0 0x1400000>; /* 20 MB */
+               };
        };
 };