parisc: Add alternative patching to synchronize_caches define

This change allows the sync barrier instruction to be patched to a nop.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>

diff --git a/arch/parisc/include/asm/barrier.h b/arch/parisc/include/asm/barrier.h
index 640d46e..c705dec 100644 (file)
--- a/arch/parisc/include/asm/barrier.h
+++ b/arch/parisc/include/asm/barrier.h
@@ -2,11 +2,15 @@
 #ifndef __ASM_BARRIER_H
 #define __ASM_BARRIER_H
 
+#include <asm/alternative.h>
+
 #ifndef __ASSEMBLY__
 
 /* The synchronize caches instruction executes as a nop on systems in
    which all memory references are performed in order. */
-#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory")
+#define synchronize_caches() asm volatile("sync" \
+       ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \
+       : : : "memory")
 
 #if defined(CONFIG_SMP)
 #define mb()           do { synchronize_caches(); } while (0)