Use LP_SIZE and ASM_ADDR in pthread_once.S

diff --git a/nptl/ChangeLog b/nptl/ChangeLog
index dab7c27..1b2f7f7 100644 (file)
--- a/nptl/ChangeLog
+++ b/nptl/ChangeLog
@@ -1,5 +1,11 @@
 2012-05-15  H.J. Lu  <hongjiu.lu@intel.com>
 
+       * sysdeps/unix/sysv/linux/x86_64/pthread_once.S
+       (__gcc_personality_v0): Replace 8-byte data alignment with
+       LP_SIZE alignment and .quad with ASM_ADDR.
+
+2012-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+
        * sysdeps/unix/sysv/linux/x86_64/pthread_cond_wait.S: Use
        LP_OP(cmp), RSI_LP and R8_LP on dep_mutex pointer.  Load
        __vdso_clock_gettime pointer into RAX_LP.

diff --git a/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S b/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
index 4dc5bac..d766ae7 100644 (file)
--- a/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
+++ b/nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
@@ -188,9 +188,9 @@ clear_once_control:
        .hidden DW.ref.__gcc_personality_v0
        .weak   DW.ref.__gcc_personality_v0
        .section .gnu.linkonce.d.DW.ref.__gcc_personality_v0,"aw",@progbits
-       .align  8
+       .align  LP_SIZE
        .type   DW.ref.__gcc_personality_v0, @object
-       .size   DW.ref.__gcc_personality_v0, 8
+       .size   DW.ref.__gcc_personality_v0, LP_SIZE
 DW.ref.__gcc_personality_v0:
-       .quad   __gcc_personality_v0
+       ASM_ADDR __gcc_personality_v0
 #endif