Store the right TCG temp (typo).

Stops ARMv6 target from segfaulting early.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4ff30c1..b62523b 100644 (file)
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -675,7 +675,7 @@ void do_interrupt_v7m(CPUARMState *env)
         env->regs[13] += 4;
         xpsr |= 0x200;
     }
-    /* Switch to the hander mode.  */
+    /* Switch to the handler mode.  */
     v7m_push(env, xpsr);
     v7m_push(env, env->regs[15]);
     v7m_push(env, env->regs[14]);

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 9ff3ff8..f1695de 100644 (file)
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6372,7 +6372,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
                     break;
                 case 1:
                     if ((insn & 0x00700020) == 0) {
-                        /* Hafword pack.  */
+                        /* Halfword pack.  */
                         tmp = load_reg(s, rn);
                         tmp2 = load_reg(s, rm);
                         shift = (insn >> 7) & 0x1f;
@@ -6455,7 +6455,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
                                 dead_tmp(tmp2);
                             }
                         }
-                        store_reg(s, rd, tmp2);
+                        store_reg(s, rd, tmp);
                     } else if ((insn & 0x003f0f60) == 0x003f0f20) {
                         /* rev */
                         tmp = load_reg(s, rm);