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drm/bridge/sii8620: enable interlace modes
58/103758/2
author
Andrzej Hajda
<a.hajda@samsung.com>
Fri, 9 Dec 2016 09:56:23 +0000
(10:56 +0100)
committer
Seung-Woo Kim
<sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:18:32 +0000
(20:18 -0800)
Bug in DECON(CRTC) driver prevented interlace modes from proper work.
Since DECON is fixed interlace modes can be enabled in MHL.
Change-Id: Ifdebbf921e173a1c10af36d678aa6f8e2921e74a
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
drivers/gpu/drm/bridge/sil-sii8620.c
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diff --git
a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
index c03ec5ddd1d245beb6f343cf86a5fce35f9f4f19..c1950f23fd7a018fb865acef3c1f7b12b4d7a04a 100644
(file)
--- a/
drivers/gpu/drm/bridge/sil-sii8620.c
+++ b/
drivers/gpu/drm/bridge/sil-sii8620.c
@@
-2091,9
+2091,6
@@
static bool sii8620_mode_fixup(struct drm_bridge *bridge,
int max_lclk;
bool ret = true;
- if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
- return false;
-
mutex_lock(&ctx->lock);
max_lclk = ctx->mode < CM_MHL3 ? MHL1_MAX_LCLK : MHL3_MAX_LCLK;