};
enum remote_reg {
- REG_LDR_ACTIVE = 0x00<<2,
- REG_LDR_IDLE = 0x01<<2,
- REG_LDR_REPEAT = 0x02<<2,
- REG_BIT_0 = 0x03<<2,
- REG_REG0 = 0x04<<2,
- REG_FRAME = 0x05<<2,
- REG_STATUS = 0x06<<2,
- REG_REG1 = 0x07<<2,
- REG_REG2 = 0x08<<2,
- REG_DURATN2 = 0x09<<2,
- REG_DURATN3 = 0x0a<<2,
- REG_FRAME1 = 0x0b<<2,
- REG_STATUS1 = 0x0c<<2,
- REG_STATUS2 = 0x0d<<2,
- REG_REG3 = 0x0e<<2,
- REG_FRAME_RSV0 = 0x0f<<2,
- REG_FRAME_RSV1 = 0x10<<2
+ REG_LDR_ACTIVE = 0x00 << 2,
+ REG_LDR_IDLE = 0x01 << 2,
+ REG_LDR_REPEAT = 0x02 << 2,
+ REG_BIT_0 = 0x03 << 2,
+ REG_REG0 = 0x04 << 2,
+ REG_FRAME = 0x05 << 2,
+ REG_STATUS = 0x06 << 2,
+ REG_REG1 = 0x07 << 2,
+ REG_REG2 = 0x08 << 2,
+ REG_DURATN2 = 0x09 << 2,
+ REG_DURATN3 = 0x0a << 2,
+ REG_FRAME1 = 0x0b << 2,
+ REG_STATUS1 = 0x0c << 2,
+ REG_STATUS2 = 0x0d << 2,
+ REG_REG3 = 0x0e << 2,
+ REG_FRAME_RSV0 = 0x0f << 2,
+ REG_FRAME_RSV1 = 0x10 << 2,
+ REG_FILTE = 0x11 << 2,
+ REG_IRQ_CTL = 0x12 << 2,
+ REG_WIDTH_NEW = 0x14 << 2,
+ REG_REPEAT_DET = 0x15 << 2
};
int ir_register_default_config(struct remote_chip *chip, int type);
{REG_DURATN3, ((51 << 16) | (38 << 0))},
};
+static struct remote_reg_map regs_default_toshiba[] = {
+ { REG_LDR_ACTIVE, (280 << 16) | (180 << 0)},
+ { REG_LDR_IDLE, (280 << 16) | (180 << 0)},
+ { REG_LDR_REPEAT, (150 << 16) | (60 << 0)},
+ { REG_BIT_0, (72 << 16) | (40 << 0)},
+ { REG_REG0, (7 << 28) | (0xFA0 << 12) | 0x13},
+ { REG_STATUS, (134 << 20) | (90 << 10)},
+ { REG_REG1, 0x9f00},
+ { REG_REG2, (0x05) | (1 << 24) | (23 << 11)},
+ { REG_DURATN2, 0x00},
+ { REG_DURATN3, 0x00},
+ { REG_REPEAT_DET, (1 << 31) | (0xFA0 << 16) | (10 << 0)},
+ { REG_REG3, 0x2AF8},
+};
+
+static int ir_toshiba_get_scancode(struct remote_chip *chip)
+{
+ int code = 0;
+ int decode_status = 0;
+ int status = 0;
+
+ remote_reg_read(chip, MULTI_IR_ID, REG_STATUS, &decode_status);
+ if (decode_status & 0x01)
+ status |= REMOTE_REPEAT;
+ chip->decode_status = status; /*set decode status*/
+ remote_reg_read(chip, MULTI_IR_ID, REG_FRAME, &code);
+ remote_dbg(chip->dev, "framecode=0x%x\n", code);
+ chip->r_dev->cur_hardcode = code;
+ code = (code >> 16) & 0xff;
+ return code;
+
+}
+
+static int ir_toshiba_get_decode_status(struct remote_chip *chip)
+{
+ int status = chip->decode_status;
+ return status;
+}
+
+static u32 ir_toshiba_get_custom_code(struct remote_chip *chip)
+{
+ u32 custom_code;
+
+ custom_code = (chip->r_dev->cur_hardcode) & 0xffff;
+ return custom_code;
+}
+
void set_hardcode(struct remote_chip *chip, int code)
{
remote_dbg(chip->dev, "framecode=0x%x\n", code);
.get_custom_code = ir_rc6_get_custom_code,
};
+static struct aml_remote_reg_proto reg_toshiba = {
+ .protocol = REMOTE_TYPE_TOSHIBA,
+ .name = "TOSHIBA",
+ .reg_map = regs_default_toshiba,
+ .reg_map_size = ARRAY_SIZE(regs_default_toshiba),
+ .get_scancode = ir_toshiba_get_scancode,
+ .get_decode_status = ir_toshiba_get_decode_status,
+ .get_custom_code = ir_toshiba_get_custom_code,
+};
const struct aml_remote_reg_proto *remote_reg_proto[] = {
®_nec,
®_rc5,
®_rc6,
®_legacy_nec,
+ ®_toshiba,
NULL
};