intel/disasm: Disassemble JIP offset for while
authorSagar Ghuge <sagar.ghuge@intel.com>
Thu, 28 Mar 2019 00:07:01 +0000 (17:07 -0700)
committerMatt Turner <mattst88@gmail.com>
Tue, 7 May 2019 21:33:48 +0000 (14:33 -0700)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/compiler/brw_disasm.c

index 04efa96..e1cc0f4 100644 (file)
@@ -1661,7 +1661,8 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
       format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
    } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
                                    opcode == BRW_OPCODE_IFF ||
-                                   opcode == BRW_OPCODE_HALT)) {
+                                   opcode == BRW_OPCODE_HALT ||
+                                   opcode == BRW_OPCODE_WHILE)) {
       pad(file, 16);
       format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
    } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {