arm64: dts: qcom: qrb5165-rb5: Add gpio-line-names for TLMM block
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fri, 4 Sep 2020 06:36:36 +0000 (12:06 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Thu, 10 Sep 2020 16:40:41 +0000 (16:40 +0000)
Add gpio-line-names property for QRB5165 RB5 board for naming all GPIOs
exposed by TLMM block.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200904063637.28632-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts

index 312316e..cf6dc0e 100644 (file)
 
 &tlmm {
        gpio-reserved-ranges = <40 4>;
+       gpio-line-names =
+               "GPIO-MM",
+               "GPIO-NN",
+               "GPIO-OO",
+               "GPIO-PP",
+               "GPIO-A",
+               "GPIO-C",
+               "GPIO-E",
+               "GPIO-D",
+               "I2C0-SDA",
+               "I2C0-SCL",
+               "GPIO-TT", /* GPIO_10 */
+               "NC",
+               "GPIO_12_I2C_SDA",
+               "GPIO_13_I2C_SCL",
+               "GPIO-X",
+               "GPIO_15_RGMII_INT",
+               "HST_BT_UART_CTS",
+               "HST_BT_UART_RFR",
+               "HST_BT_UART_TX",
+               "HST_BT_UART_RX",
+               "HST_WLAN_EN", /* GPIO_20 */
+               "HST_BT_EN",
+               "GPIO-AAA",
+               "GPIO-BBB",
+               "GPIO-CCC",
+               "GPIO-Z",
+               "GPIO-DDD",
+               "GPIO-BB",
+               "GPIO_28_CAN_SPI_MISO",
+               "GPIO_29_CAN_SPI_MOSI",
+               "GPIO_30_CAN_SPI_CLK", /* GPIO_30 */
+               "GPIO_31_CAN_SPI_CS",
+               "GPIO-UU",
+               "NC",
+               "UART1_TXD_SOM",
+               "UART1_RXD_SOM",
+               "UART0_CTS",
+               "UART0_RTS",
+               "UART0_TXD",
+               "UART0_RXD",
+               "SPI1_MISO", /* GPIO_40 */
+               "SPI1_MOSI",
+               "SPI1_CLK",
+               "SPI1_CS",
+               "I2C1_SDA",
+               "I2C1_SCL",
+               "GPIO-F",
+               "GPIO-JJ",
+               "Board_ID1",
+               "Board_ID2",
+               "NC", /* GPIO_50 */
+               "NC",
+               "SPI0_MISO",
+               "SPI0_MOSI",
+               "SPI0_SCLK",
+               "SPI0_CS",
+               "GPIO-QQ",
+               "GPIO-RR",
+               "USB2LAN_RESET",
+               "USB2LAN_EXTWAKE",
+               "NC", /* GPIO_60 */
+               "NC",
+               "NC",
+               "LT9611_INT",
+               "GPIO-AA",
+               "USB_CC_DIR",
+               "GPIO-G",
+               "GPIO-LL",
+               "USB_DP_HPD_1P8",
+               "NC",
+               "NC", /* GPIO_70 */
+               "SD_CMD",
+               "SD_DAT3",
+               "SD_SCLK",
+               "SD_DAT2",
+               "SD_DAT1",
+               "SD_DAT0", /* BOOT_CFG3 */
+               "SD_UFS_CARD_DET_N",
+               "GPIO-II",
+               "PCIE0_RST_N",
+               "PCIE0_CLK_REQ_N", /* GPIO_80 */
+               "PCIE0_WAKE_N",
+               "GPIO-CC",
+               "GPIO-DD",
+               "GPIO-EE",
+               "GPIO-FF",
+               "GPIO-GG",
+               "GPIO-HH",
+               "GPIO-VV",
+               "GPIO-WW",
+               "NC", /* GPIO_90 */
+               "NC",
+               "GPIO-K",
+               "GPIO-I",
+               "CSI0_MCLK",
+               "CSI1_MCLK",
+               "CSI2_MCLK",
+               "CSI3_MCLK",
+               "GPIO-AA", /* CSI4_MCLK */
+               "GPIO-BB", /* CSI5_MCLK */
+               "GPIO-KK", /* GPIO_100 */
+               "CCI_I2C_SDA0",
+               "CCI_I2C_SCL0",
+               "CCI_I2C_SDA1",
+               "CCI_I2C_SCL1",
+               "CCI_I2C_SDA2",
+               "CCI_I2C_SCL2",
+               "CCI_I2C_SDA3",
+               "CCI_I2C_SCL3",
+               "GPIO-L",
+               "NC", /* GPIO_110 */
+               "NC",
+               "ACCEL_INT",
+               "GYRO_INT",
+               "GPIO-J",
+               "GPIO-YY",
+               "GPIO-H",
+               "GPIO-ZZ",
+               "NC",
+               "NC",
+               "NC", /* GPIO_120 */
+               "NC",
+               "MAG_INT",
+               "MAG_DRDY_INT",
+               "HST_SW_CTRL",
+               "GPIO-M",
+               "GPIO-N",
+               "GPIO-O",
+               "GPIO-P",
+               "PS_INT",
+               "WSA1_EN", /* GPIO_130 */
+               "USB_HUB_RESET",
+               "SDM_FORCE_USB_BOOT",
+               "I2S1_CLK_HDMI",
+               "I2S1_DATA0_HDMI",
+               "I2S1_WS_HDMI",
+               "GPIO-B",
+               "GPIO_137", /* To LT9611_I2S_MCLK_3V3 */
+               "PCM_CLK",
+               "PCM_DI",
+               "PCM_DO", /* GPIO_140 */
+               "PCM_FS",
+               "HST_SLIM_CLK",
+               "HST_SLIM_DATA",
+               "GPIO-U",
+               "GPIO-Y",
+               "GPIO-R",
+               "GPIO-Q",
+               "GPIO-S",
+               "GPIO-T",
+               "GPIO-V", /* GPIO_150 */
+               "GPIO-W",
+               "DMIC_CLK1",
+               "DMIC_DATA1",
+               "DMIC_CLK2",
+               "DMIC_DATA2",
+               "WSA_SWR_CLK",
+               "WSA_SWR_DATA",
+               "DMIC_CLK3",
+               "DMIC_DATA3",
+               "I2C4_SDA", /* GPIO_160 */
+               "I2C4_SCL",
+               "SPI3_CS1",
+               "SPI3_CS2",
+               "SPI2_MISO_LS3",
+               "SPI2_MOSI_LS3",
+               "SPI2_CLK_LS3",
+               "SPI2_ACCEL_CS_LS3",
+               "SPI2_CS1",
+               "NC",
+               "GPIO-SS", /* GPIO_170 */
+               "GPIO-XX",
+               "SPI3_MISO",
+               "SPI3_MOSI",
+               "SPI3_CLK",
+               "SPI3_CS",
+               "HST_BLE_SNS_UART_TX",
+               "HST_BLE_SNS_UART_RX",
+               "HST_WLAN_UART_TX",
+               "HST_WLAN_UART_RX";
 };
 
 &uart12 {