drm/amd/display: add prefix to amdgpu_dm_crtc.h functions
authorDavid Tadokoro <davidbtadokoro@usp.br>
Tue, 7 Mar 2023 19:14:17 +0000 (16:14 -0300)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 8 Mar 2023 19:05:53 +0000 (14:05 -0500)
Some amdgpu_dm_crtc.h functions didn't have names that indicated where
they were declared.

To better filter results in debug tools like ftrace, prefix these
functions with 'amdgpu_dm_crtc_'.

Signed-off-by: David Tadokoro <davidbtadokoro@usp.br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

index 0e92bf6d286edb21c18cc7602e3e2a84e7c2362e..ae994c6c65ac46ae49db5e18198cb9ef7af53dbf 100644 (file)
@@ -342,7 +342,7 @@ static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
 {
        if (new_state->freesync_config.state ==  VRR_STATE_ACTIVE_FIXED)
                return true;
-       else if (amdgpu_dm_vrr_active(old_state) != amdgpu_dm_vrr_active(new_state))
+       else if (amdgpu_dm_crtc_vrr_active(old_state) != amdgpu_dm_crtc_vrr_active(new_state))
                return true;
        else
                return false;
@@ -436,7 +436,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
 
        WARN_ON(!e);
 
-       vrr_active = amdgpu_dm_vrr_active_irq(amdgpu_crtc);
+       vrr_active = amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
 
        /* Fixed refresh rate, or VRR scanout position outside front-porch? */
        if (!vrr_active ||
@@ -510,7 +510,7 @@ static void dm_vupdate_high_irq(void *interrupt_params)
        acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VUPDATE);
 
        if (acrtc) {
-               vrr_active = amdgpu_dm_vrr_active_irq(acrtc);
+               vrr_active = amdgpu_dm_crtc_vrr_active_irq(acrtc);
                drm_dev = acrtc->base.dev;
                vblank = &drm_dev->vblank[acrtc->base.index];
                previous_timestamp = atomic64_read(&irq_params->previous_timestamp);
@@ -534,7 +534,7 @@ static void dm_vupdate_high_irq(void *interrupt_params)
                 * if a pageflip happened inside front-porch.
                 */
                if (vrr_active) {
-                       dm_crtc_handle_vblank(acrtc);
+                       amdgpu_dm_crtc_handle_vblank(acrtc);
 
                        /* BTR processing for pre-DCE12 ASICs */
                        if (acrtc->dm_irq_params.stream &&
@@ -574,7 +574,7 @@ static void dm_crtc_high_irq(void *interrupt_params)
        if (!acrtc)
                return;
 
-       vrr_active = amdgpu_dm_vrr_active_irq(acrtc);
+       vrr_active = amdgpu_dm_crtc_vrr_active_irq(acrtc);
 
        DC_LOG_VBLANK("crtc:%d, vupdate-vrr:%d, planes:%d\n", acrtc->crtc_id,
                      vrr_active, acrtc->dm_irq_params.active_planes);
@@ -586,7 +586,7 @@ static void dm_crtc_high_irq(void *interrupt_params)
         * to dm_vupdate_high_irq after end of front-porch.
         */
        if (!vrr_active)
-               dm_crtc_handle_vblank(acrtc);
+               amdgpu_dm_crtc_handle_vblank(acrtc);
 
        /**
         * Following stuff must happen at start of vblank, for crc
@@ -2483,11 +2483,11 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,
                                         enable ? "enable" : "disable");
 
                        if (enable) {
-                               rc = dm_enable_vblank(&acrtc->base);
+                               rc = amdgpu_dm_crtc_enable_vblank(&acrtc->base);
                                if (rc)
                                        DRM_WARN("Failed to enable vblank interrupts\n");
                        } else {
-                               dm_disable_vblank(&acrtc->base);
+                               amdgpu_dm_crtc_disable_vblank(&acrtc->base);
                        }
 
                }
@@ -7739,7 +7739,7 @@ static void update_freesync_state_on_stream(
                        &vrr_params);
 
                if (adev->family < AMDGPU_FAMILY_AI &&
-                   amdgpu_dm_vrr_active(new_crtc_state)) {
+                   amdgpu_dm_crtc_vrr_active(new_crtc_state)) {
                        mod_freesync_handle_v_update(dm->freesync_module,
                                                     new_stream, &vrr_params);
 
@@ -7857,8 +7857,8 @@ static void update_stream_irq_parameters(
 static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
                                            struct dm_crtc_state *new_state)
 {
-       bool old_vrr_active = amdgpu_dm_vrr_active(old_state);
-       bool new_vrr_active = amdgpu_dm_vrr_active(new_state);
+       bool old_vrr_active = amdgpu_dm_crtc_vrr_active(old_state);
+       bool new_vrr_active = amdgpu_dm_crtc_vrr_active(new_state);
 
        if (!old_vrr_active && new_vrr_active) {
                /* Transition VRR inactive -> active:
@@ -7869,7 +7869,7 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
                 * We also need vupdate irq for the actual core vblank handling
                 * at end of vblank.
                 */
-               WARN_ON(dm_set_vupdate_irq(new_state->base.crtc, true) != 0);
+               WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, true) != 0);
                WARN_ON(drm_crtc_vblank_get(new_state->base.crtc) != 0);
                DRM_DEBUG_DRIVER("%s: crtc=%u VRR off->on: Get vblank ref\n",
                                 __func__, new_state->base.crtc->base.id);
@@ -7877,7 +7877,7 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
                /* Transition VRR active -> inactive:
                 * Allow vblank irq disable again for fixed refresh rate.
                 */
-               WARN_ON(dm_set_vupdate_irq(new_state->base.crtc, false) != 0);
+               WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, false) != 0);
                drm_crtc_vblank_put(new_state->base.crtc);
                DRM_DEBUG_DRIVER("%s: crtc=%u VRR on->off: Drop vblank ref\n",
                                 __func__, new_state->base.crtc->base.id);
@@ -7919,7 +7919,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
        int planes_count = 0, vpos, hpos;
        unsigned long flags;
        u32 target_vblank, last_flip_vblank;
-       bool vrr_active = amdgpu_dm_vrr_active(acrtc_state);
+       bool vrr_active = amdgpu_dm_crtc_vrr_active(acrtc_state);
        bool cursor_update = false;
        bool pflip_present = false;
        bool dirty_rects_changed = false;
@@ -8469,7 +8469,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
                 * aconnector as needed
                 */
 
-               if (modeset_required(new_crtc_state, dm_new_crtc_state->stream, dm_old_crtc_state->stream)) {
+               if (amdgpu_dm_crtc_modeset_required(new_crtc_state, dm_new_crtc_state->stream, dm_old_crtc_state->stream)) {
 
                        DRM_DEBUG_ATOMIC("Atomic commit: SET crtc id %d: [%p]\n", acrtc->crtc_id, acrtc);
 
@@ -9294,7 +9294,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,
                if (modereset_required(new_crtc_state))
                        goto skip_modeset;
 
-               if (modeset_required(new_crtc_state, new_stream,
+               if (amdgpu_dm_crtc_modeset_required(new_crtc_state, new_stream,
                                     dm_old_crtc_state->stream)) {
 
                        WARN_ON(dm_new_crtc_state->stream);
index dc4f37240beb4c3a61bfd77386ac548c14be0ebe..1d924dc51a3eb118d8f2df019919d3df9d392067 100644 (file)
@@ -34,7 +34,7 @@
 #include "amdgpu_dm_trace.h"
 #include "amdgpu_dm_debugfs.h"
 
-void dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc)
+void amdgpu_dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc)
 {
        struct drm_crtc *crtc = &acrtc->base;
        struct drm_device *dev = crtc->dev;
@@ -54,14 +54,14 @@ void dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc)
        spin_unlock_irqrestore(&dev->event_lock, flags);
 }
 
-bool modeset_required(struct drm_crtc_state *crtc_state,
+bool amdgpu_dm_crtc_modeset_required(struct drm_crtc_state *crtc_state,
                             struct dc_stream_state *new_stream,
                             struct dc_stream_state *old_stream)
 {
        return crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state);
 }
 
-bool amdgpu_dm_vrr_active_irq(struct amdgpu_crtc *acrtc)
+bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *acrtc)
 
 {
        return acrtc->dm_irq_params.freesync_config.state ==
@@ -70,7 +70,7 @@ bool amdgpu_dm_vrr_active_irq(struct amdgpu_crtc *acrtc)
                       VRR_STATE_ACTIVE_FIXED;
 }
 
-int dm_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
+int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
 {
        enum dc_irq_source irq_source;
        struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
@@ -89,7 +89,7 @@ int dm_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
        return rc;
 }
 
-bool amdgpu_dm_vrr_active(struct dm_crtc_state *dm_state)
+bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state)
 {
        return dm_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE ||
               dm_state->freesync_config.state == VRR_STATE_ACTIVE_FIXED;
@@ -159,11 +159,11 @@ static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable)
 
        if (enable) {
                /* vblank irq on -> Only need vupdate irq in vrr mode */
-               if (amdgpu_dm_vrr_active(acrtc_state))
-                       rc = dm_set_vupdate_irq(crtc, true);
+               if (amdgpu_dm_crtc_vrr_active(acrtc_state))
+                       rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);
        } else {
                /* vblank irq off -> vupdate irq off */
-               rc = dm_set_vupdate_irq(crtc, false);
+               rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);
        }
 
        if (rc)
@@ -199,12 +199,12 @@ skip:
        return 0;
 }
 
-int dm_enable_vblank(struct drm_crtc *crtc)
+int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc)
 {
        return dm_set_vblank(crtc, true);
 }
 
-void dm_disable_vblank(struct drm_crtc *crtc)
+void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc)
 {
        dm_set_vblank(crtc, false);
 }
@@ -300,8 +300,8 @@ static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
        .verify_crc_source = amdgpu_dm_crtc_verify_crc_source,
        .get_crc_sources = amdgpu_dm_crtc_get_crc_sources,
        .get_vblank_counter = amdgpu_get_vblank_counter_kms,
-       .enable_vblank = dm_enable_vblank,
-       .disable_vblank = dm_disable_vblank,
+       .enable_vblank = amdgpu_dm_crtc_enable_vblank,
+       .disable_vblank = amdgpu_dm_crtc_disable_vblank,
        .get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp,
 #if defined(CONFIG_DEBUG_FS)
        .late_register = amdgpu_dm_crtc_late_register,
@@ -381,7 +381,7 @@ static int dm_crtc_helper_atomic_check(struct drm_crtc *crtc,
        dm_update_crtc_active_planes(crtc, crtc_state);
 
        if (WARN_ON(unlikely(!dm_crtc_state->stream &&
-                       modeset_required(crtc_state, NULL, dm_crtc_state->stream)))) {
+                       amdgpu_dm_crtc_modeset_required(crtc_state, NULL, dm_crtc_state->stream)))) {
                return ret;
        }
 
index 1ac8692354cf0f5c9e5611c1176fd93caa665eec..17e948753f59bd1a0b489f44b6cfcc9a66a464b6 100644 (file)
 #ifndef __AMDGPU_DM_CRTC_H__
 #define __AMDGPU_DM_CRTC_H__
 
-void dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc);
+void amdgpu_dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc);
 
-bool modeset_required(struct drm_crtc_state *crtc_state,
+bool amdgpu_dm_crtc_modeset_required(struct drm_crtc_state *crtc_state,
                      struct dc_stream_state *new_stream,
                      struct dc_stream_state *old_stream);
 
-int dm_set_vupdate_irq(struct drm_crtc *crtc, bool enable);
+int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable);
 
-bool amdgpu_dm_vrr_active_irq(struct amdgpu_crtc *acrtc);
+bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *acrtc);
 
-bool amdgpu_dm_vrr_active(struct dm_crtc_state *dm_state);
+bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state);
 
-int dm_enable_vblank(struct drm_crtc *crtc);
+int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc);
 
-void dm_disable_vblank(struct drm_crtc *crtc);
+void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc);
 
 int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
                        struct drm_plane *plane,