net/mlx5: DR, Add STE setters and getters per-device API
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Thu, 19 Nov 2020 04:41:57 +0000 (06:41 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Tue, 5 Jan 2021 23:00:47 +0000 (15:00 -0800)
Extend the STE context struct with various per-device
setters and getters.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h

index 0773dad..53bb429 100644 (file)
@@ -76,6 +76,7 @@ u16 mlx5dr_ste_conv_bit_to_byte_mask(u8 *bit_mask);
                                 struct mlx5dr_match_param *mask))
 
 struct mlx5dr_ste_ctx {
+       /* Builders */
        void DR_STE_CTX_BUILDER(eth_l2_src_dst);
        void DR_STE_CTX_BUILDER(eth_l3_ipv6_src);
        void DR_STE_CTX_BUILDER(eth_l3_ipv6_dst);
@@ -96,6 +97,17 @@ struct mlx5dr_ste_ctx {
        void DR_STE_CTX_BUILDER(register_0);
        void DR_STE_CTX_BUILDER(register_1);
        void DR_STE_CTX_BUILDER(src_gvmi_qpn);
+
+       /* Getters and Setters */
+       void (*ste_init)(u8 *hw_ste_p, u16 lu_type,
+                        u8 entry_type, u16 gvmi);
+       void (*set_next_lu_type)(u8 *hw_ste_p, u16 lu_type);
+       u16  (*get_next_lu_type)(u8 *hw_ste_p);
+       void (*set_miss_addr)(u8 *hw_ste_p, u64 miss_addr);
+       u64  (*get_miss_addr)(u8 *hw_ste_p);
+       void (*set_hit_addr)(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
+       void (*set_byte_mask)(u8 *hw_ste_p, u16 byte_mask);
+       u16  (*get_byte_mask)(u8 *hw_ste_p);
 };
 
 extern struct mlx5dr_ste_ctx ste_ctx_v0;