[turbofan] cleanup InstructionSequence

R=bmeurer@chromium.org

BUG=

Review URL: https://codereview.chromium.org/664123002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24753 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/compiler/arm64/code-generator-arm64.cc b/src/compiler/arm64/code-generator-arm64.cc
index ce4336a7b0bfd2df1dc871e64d4493fb73462b85..04acfb8aa634fece924544cb51adce072271007e 100644 (file)
--- a/src/compiler/arm64/code-generator-arm64.cc
+++ b/src/compiler/arm64/code-generator-arm64.cc
@@ -545,9 +545,8 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       Register value = i.InputRegister(2);
       __ Add(index, object, Operand(index, SXTW));
       __ Str(value, MemOperand(index));
-      SaveFPRegsMode mode = code_->frame()->DidAllocateDoubleRegisters()
-                                ? kSaveFPRegs
-                                : kDontSaveFPRegs;
+      SaveFPRegsMode mode =
+          frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
       // TODO(dcarney): we shouldn't test write barriers from c calls.
       LinkRegisterStatus lr_status = kLRHasNotBeenSaved;
       UseScratchRegisterScope scope(masm());

diff --git a/src/compiler/code-generator.cc b/src/compiler/code-generator.cc
index d1faeb07f65a02330a614070c224aa8f0250e003..5b3a2db086fcd51309843af177bec8e44701e051 100644 (file)
--- a/src/compiler/code-generator.cc
+++ b/src/compiler/code-generator.cc
@@ -12,8 +12,11 @@ namespace v8 {
 namespace internal {
 namespace compiler {
 
-CodeGenerator::CodeGenerator(InstructionSequence* code)
-    : code_(code),
+CodeGenerator::CodeGenerator(Frame* frame, Linkage* linkage,
+                             InstructionSequence* code)
+    : frame_(frame),
+      linkage_(linkage),
+      code_(code),
       current_block_(BasicBlock::RpoNumber::Invalid()),
       current_source_position_(SourcePosition::Invalid()),
       masm_(code->zone()->isolate(), NULL, 0),

diff --git a/src/compiler/code-generator.h b/src/compiler/code-generator.h
index 8b1c9d58eec96d427af67af7131dabcc3680ff65..f3ef1ce6e0d895b93a7c5a6256c33d3a2a313211 100644 (file)
--- a/src/compiler/code-generator.h
+++ b/src/compiler/code-generator.h
@@ -20,15 +20,16 @@ namespace compiler {
 // Generates native code for a sequence of instructions.
 class CodeGenerator FINAL : public GapResolver::Assembler {
  public:
-  explicit CodeGenerator(InstructionSequence* code);
+  explicit CodeGenerator(Frame* frame, Linkage* linkage,
+                         InstructionSequence* code);
 
   // Generate native code.
   Handle<Code> GenerateCode();
 
   InstructionSequence* code() const { return code_; }
-  Frame* frame() const { return code()->frame(); }
+  Frame* frame() const { return frame_; }
   Isolate* isolate() const { return zone()->isolate(); }
-  Linkage* linkage() const { return code()->linkage(); }
+  Linkage* linkage() const { return linkage_; }
 
  private:
   MacroAssembler* masm() { return &masm_; }
@@ -116,7 +117,9 @@ class CodeGenerator FINAL : public GapResolver::Assembler {
     int pc_offset_;
   };
 
-  InstructionSequence* code_;
+  Frame* const frame_;
+  Linkage* const linkage_;
+  InstructionSequence* const code_;
   BasicBlock::RpoNumber current_block_;
   SourcePosition current_source_position_;
   MacroAssembler masm_;

diff --git a/src/compiler/ia32/code-generator-ia32.cc b/src/compiler/ia32/code-generator-ia32.cc
index 81cf8997047d89c49a7dfbcd707a39468167714a..a4f1e0373a133dd8a16e8dbb4ceda924c4726aab 100644 (file)
--- a/src/compiler/ia32/code-generator-ia32.cc
+++ b/src/compiler/ia32/code-generator-ia32.cc
@@ -455,9 +455,8 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       Register value = i.InputRegister(2);
       __ mov(Operand(object, index, times_1, 0), value);
       __ lea(index, Operand(object, index, times_1, 0));
-      SaveFPRegsMode mode = code_->frame()->DidAllocateDoubleRegisters()
-                                ? kSaveFPRegs
-                                : kDontSaveFPRegs;
+      SaveFPRegsMode mode =
+          frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
       __ RecordWrite(object, index, value, mode);
       break;
     }

diff --git a/src/compiler/instruction-selector.cc b/src/compiler/instruction-selector.cc
index b0a6fceda6b38766b060efdde852b49883220621..c996f490a10b4ab6134b0a67c1d01b95445007c9 100644 (file)
--- a/src/compiler/instruction-selector.cc
+++ b/src/compiler/instruction-selector.cc
@@ -13,11 +13,13 @@ namespace v8 {
 namespace internal {
 namespace compiler {
 
-InstructionSelector::InstructionSelector(InstructionSequence* sequence,
+InstructionSelector::InstructionSelector(Linkage* linkage,
+                                         InstructionSequence* sequence,
                                          Schedule* schedule,
                                          SourcePositionTable* source_positions,
                                          Features features)
     : zone_(sequence->isolate()),
+      linkage_(linkage),
       sequence_(sequence),
       source_positions_(source_positions),
       features_(features),

diff --git a/src/compiler/instruction-selector.h b/src/compiler/instruction-selector.h
index 6d00b0464d3d05dd8e916eb61aa71fcf2d9737c3..78e8a68630a4b2ae6186d85fb4abdae1ff4e61a3 100644 (file)
--- a/src/compiler/instruction-selector.h
+++ b/src/compiler/instruction-selector.h
@@ -25,8 +25,8 @@ class InstructionSelector FINAL {
   // Forward declarations.
   class Features;
 
-  InstructionSelector(InstructionSequence* sequence, Schedule* schedule,
-                      SourcePositionTable* source_positions,
+  InstructionSelector(Linkage* linkage, InstructionSequence* sequence,
+                      Schedule* schedule, SourcePositionTable* source_positions,
                       Features features = SupportedFeatures());
 
   // Visit code for the entire graph with the included schedule.
@@ -183,8 +183,8 @@ class InstructionSelector FINAL {
 
   // ===========================================================================
 
-  Linkage* linkage() const { return sequence()->linkage(); }
   Schedule* schedule() const { return schedule_; }
+  Linkage* linkage() const { return linkage_; }
   InstructionSequence* sequence() const { return sequence_; }
   Zone* instruction_zone() const { return sequence()->zone(); }
   Zone* zone() { return &zone_; }
@@ -192,10 +192,11 @@ class InstructionSelector FINAL {
   // ===========================================================================
 
   Zone zone_;
-  InstructionSequence* sequence_;
-  SourcePositionTable* source_positions_;
+  Linkage* const linkage_;
+  InstructionSequence* const sequence_;
+  SourcePositionTable* const source_positions_;
   Features features_;
-  Schedule* schedule_;
+  Schedule* const schedule_;
   BasicBlock* current_block_;
   ZoneDeque<Instruction*> instructions_;
   BoolVector defined_;

diff --git a/src/compiler/instruction.cc b/src/compiler/instruction.cc
index 0f041af989cf465e8e5afdae6bb993da2a1b7a09..363e7909cf99bf9f00dc9a75518fb04b8c770607 100644 (file)
--- a/src/compiler/instruction.cc
+++ b/src/compiler/instruction.cc
@@ -381,14 +381,12 @@ static void InitializeInstructionBlocks(Zone* zone, const Schedule* schedule,
 
 
 InstructionSequence::InstructionSequence(Zone* instruction_zone,
-                                         Linkage* linkage, const Graph* graph,
+                                         const Graph* graph,
                                          const Schedule* schedule)
     : zone_(instruction_zone),
-      node_count_(graph->NodeCount()),
-      node_map_(zone()->NewArray<int>(node_count_)),
+      node_map_(graph->NodeCount(), kNodeUnmapped, zone()),
       instruction_blocks_(static_cast<int>(schedule->rpo_order()->size()), NULL,
                           zone()),
-      linkage_(linkage),
       constants_(ConstantMap::key_compare(),
                  ConstantMap::allocator_type(zone())),
       immediates_(zone()),
@@ -398,15 +396,12 @@ InstructionSequence::InstructionSequence(Zone* instruction_zone,
       doubles_(std::less<int>(), VirtualRegisterSet::allocator_type(zone())),
       references_(std::less<int>(), VirtualRegisterSet::allocator_type(zone())),
       deoptimization_entries_(zone()) {
-  for (int i = 0; i < node_count_; ++i) {
-    node_map_[i] = -1;
-  }
   InitializeInstructionBlocks(zone(), schedule, &instruction_blocks_);
 }
 
 
 int InstructionSequence::GetVirtualRegister(const Node* node) {
-  if (node_map_[node->id()] == -1) {
+  if (node_map_[node->id()] == kNodeUnmapped) {
     node_map_[node->id()] = NextVirtualRegister();
   }
   return node_map_[node->id()];
@@ -604,7 +599,7 @@ std::ostream& operator<<(std::ostream& os, const InstructionSequence& code) {
        it != code.constants_.end(); ++i, ++it) {
     os << "CST#" << i << ": v" << it->first << " = " << it->second << "\n";
   }
-  for (int i = 0; i < code.BasicBlockCount(); i++) {
+  for (int i = 0; i < code.InstructionBlockCount(); i++) {
     BasicBlock::RpoNumber rpo = BasicBlock::RpoNumber::FromInt(i);
     const InstructionBlock* block = code.InstructionBlockAt(rpo);
     CHECK(block->rpo_number() == rpo);

diff --git a/src/compiler/instruction.h b/src/compiler/instruction.h
index 7359356b11f9718cbdc5e269f388c4674e486b5a..fddc225f8a23286a9b8a59a070248c9a3d0843e9 100644 (file)
--- a/src/compiler/instruction.h
+++ b/src/compiler/instruction.h
@@ -838,21 +838,23 @@ typedef ZoneDeque<Instruction*> InstructionDeque;
 typedef ZoneDeque<PointerMap*> PointerMapDeque;
 typedef ZoneVector<FrameStateDescriptor*> DeoptimizationVector;
 typedef ZoneVector<InstructionBlock*> InstructionBlocks;
+typedef IntVector NodeToVregMap;
 
 // Represents architecture-specific generated code before, during, and after
 // register allocation.
 // TODO(titzer): s/IsDouble/IsFloat64/
 class InstructionSequence FINAL {
  public:
-  InstructionSequence(Zone* zone, Linkage* linkage, const Graph* graph,
-                      const Schedule* schedule);
+  static const int kNodeUnmapped = -1;
+
+  InstructionSequence(Zone* zone, const Graph* graph, const Schedule* schedule);
 
   int NextVirtualRegister() { return next_virtual_register_++; }
   int VirtualRegisterCount() const { return next_virtual_register_; }
 
-  int node_count() const { return node_count_; }
+  int node_count() const { return static_cast<int>(node_map_.size()); }
 
-  int BasicBlockCount() const {
+  int InstructionBlockCount() const {
     return static_cast<int>(instruction_blocks_.size());
   }
 
@@ -865,19 +867,10 @@ class InstructionSequence FINAL {
     return instruction_blocks_[rpo_number.ToSize()];
   }
 
-  // TODO(dcarney): move to register allocator.
-  const InstructionBlock* GetContainingLoop(
-      const InstructionBlock* block) const {
-    BasicBlock::RpoNumber index = block->loop_header();
-    if (!index.IsValid()) return NULL;
-    return instruction_blocks_[index.ToInt()];
-  }
-
   const InstructionBlock* GetInstructionBlock(int instruction_index) const;
 
   int GetVirtualRegister(const Node* node);
-  // TODO(dcarney): find a way to remove this.
-  const int* GetNodeMapForTesting() const { return node_map_; }
+  const NodeToVregMap& GetNodeMapForTesting() const { return node_map_; }
 
   bool IsReference(int virtual_register) const;
   bool IsDouble(int virtual_register) const;
@@ -904,9 +897,7 @@ class InstructionSequence FINAL {
     return instructions_[index];
   }
 
-  Frame* frame() { return &frame_; }
   Isolate* isolate() const { return zone()->isolate(); }
-  Linkage* linkage() const { return linkage_; }
   const PointerMapDeque* pointer_maps() const { return &pointer_maps_; }
   Zone* zone() const { return zone_; }
 
@@ -962,11 +953,9 @@ class InstructionSequence FINAL {
 
   typedef std::set<int, std::less<int>, ZoneIntAllocator> VirtualRegisterSet;
 
-  Zone* zone_;
-  int node_count_;
-  int* node_map_;
+  Zone* const zone_;
+  NodeToVregMap node_map_;
   InstructionBlocks instruction_blocks_;
-  Linkage* linkage_;
   ConstantMap constants_;
   ConstantDeque immediates_;
   InstructionDeque instructions_;
@@ -974,7 +963,6 @@ class InstructionSequence FINAL {
   PointerMapDeque pointer_maps_;
   VirtualRegisterSet doubles_;
   VirtualRegisterSet references_;
-  Frame frame_;
   DeoptimizationVector deoptimization_entries_;
 };
 

diff --git a/src/compiler/pipeline.cc b/src/compiler/pipeline.cc
index f38065e411834e7e30fc592321ba3698d7478749..df8673797a0ce7eb888078c91291fb01951d17e6 100644 (file)
--- a/src/compiler/pipeline.cc
+++ b/src/compiler/pipeline.cc
@@ -454,11 +454,12 @@ Handle<Code> Pipeline::GenerateCode(Linkage* linkage, Graph* graph,
   }
 
   Zone* instruction_zone = schedule->zone();
-  InstructionSequence sequence(instruction_zone, linkage, graph, schedule);
+  InstructionSequence sequence(instruction_zone, graph, schedule);
 
   // Select and schedule instructions covering the scheduled graph.
   {
-    InstructionSelector selector(&sequence, schedule, source_positions);
+    InstructionSelector selector(linkage, &sequence, schedule,
+                                 source_positions);
     selector.SelectInstructions();
   }
 
@@ -471,13 +472,14 @@ Handle<Code> Pipeline::GenerateCode(Linkage* linkage, Graph* graph,
   }
 
   // Allocate registers.
+  Frame frame;
   {
     int node_count = graph->NodeCount();
     if (node_count > UnallocatedOperand::kMaxVirtualRegisters) {
       linkage->info()->AbortOptimization(kNotEnoughVirtualRegistersForValues);
       return Handle<Code>::null();
     }
-    RegisterAllocator allocator(&sequence);
+    RegisterAllocator allocator(&frame, linkage->info(), &sequence);
     if (!allocator.Allocate()) {
       linkage->info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc);
       return Handle<Code>::null();
@@ -494,7 +496,7 @@ Handle<Code> Pipeline::GenerateCode(Linkage* linkage, Graph* graph,
   }
 
   // Generate native sequence.
-  CodeGenerator generator(&sequence);
+  CodeGenerator generator(&frame, linkage, &sequence);
   Handle<Code> code = generator.GenerateCode();
   if (profiler_data != NULL) {
 #if ENABLE_DISASSEMBLER

diff --git a/src/compiler/register-allocator.cc b/src/compiler/register-allocator.cc
index 6499554db29d103d3f049dc82445b0bf589c02d0..8f024527503a761409b58046c64999c4d76cf3b4 100644 (file)
--- a/src/compiler/register-allocator.cc
+++ b/src/compiler/register-allocator.cc
@@ -499,10 +499,13 @@ LifetimePosition LiveRange::FirstIntersection(LiveRange* other) {
 }
 
 
-RegisterAllocator::RegisterAllocator(InstructionSequence* code)
+RegisterAllocator::RegisterAllocator(Frame* frame, CompilationInfo* info,
+                                     InstructionSequence* code)
     : zone_(code->isolate()),
+      frame_(frame),
+      info_(info),
       code_(code),
-      live_in_sets_(code->BasicBlockCount(), zone()),
+      live_in_sets_(code->InstructionBlockCount(), zone()),
       live_ranges_(code->VirtualRegisterCount() * 2, zone()),
       fixed_live_ranges_(NULL),
       fixed_double_live_ranges_(NULL),
@@ -517,7 +520,7 @@ RegisterAllocator::RegisterAllocator(InstructionSequence* code)
 
 void RegisterAllocator::InitializeLivenessAnalysis() {
   // Initialize the live_in sets for each block to NULL.
-  int block_count = code()->BasicBlockCount();
+  int block_count = code()->InstructionBlockCount();
   live_in_sets_.Initialize(block_count, zone());
   live_in_sets_.AddBlock(NULL, block_count, zone());
 }
@@ -1107,15 +1110,15 @@ bool RegisterAllocator::Allocate() {
   PopulatePointerMaps();
   ConnectRanges();
   ResolveControlFlow();
-  code()->frame()->SetAllocatedRegisters(assigned_registers_);
-  code()->frame()->SetAllocatedDoubleRegisters(assigned_double_registers_);
+  frame()->SetAllocatedRegisters(assigned_registers_);
+  frame()->SetAllocatedDoubleRegisters(assigned_double_registers_);
   return true;
 }
 
 
 void RegisterAllocator::MeetRegisterConstraints() {
   RegisterAllocatorPhase phase("L_Register constraints", this);
-  for (int i = 0; i < code()->BasicBlockCount(); ++i) {
+  for (int i = 0; i < code()->InstructionBlockCount(); ++i) {
     MeetRegisterConstraints(
         code()->InstructionBlockAt(BasicBlock::RpoNumber::FromInt(i)));
     if (!AllocationOk()) return;
@@ -1127,7 +1130,7 @@ void RegisterAllocator::ResolvePhis() {
   RegisterAllocatorPhase phase("L_Resolve phis", this);
 
   // Process the blocks in reverse order.
-  for (int i = code()->BasicBlockCount() - 1; i >= 0; --i) {
+  for (int i = code()->InstructionBlockCount() - 1; i >= 0; --i) {
     ResolvePhis(code()->InstructionBlockAt(BasicBlock::RpoNumber::FromInt(i)));
   }
 }
@@ -1248,7 +1251,8 @@ bool RegisterAllocator::CanEagerlyResolveControlFlow(
 
 void RegisterAllocator::ResolveControlFlow() {
   RegisterAllocatorPhase phase("L_Resolve control flow", this);
-  for (int block_id = 1; block_id < code()->BasicBlockCount(); ++block_id) {
+  for (int block_id = 1; block_id < code()->InstructionBlockCount();
+       ++block_id) {
     const InstructionBlock* block =
         code()->InstructionBlockAt(BasicBlock::RpoNumber::FromInt(block_id));
     if (CanEagerlyResolveControlFlow(block)) continue;
@@ -1271,7 +1275,7 @@ void RegisterAllocator::BuildLiveRanges() {
   RegisterAllocatorPhase phase("L_Build live ranges", this);
   InitializeLivenessAnalysis();
   // Process the blocks in reverse order.
-  for (int block_id = code()->BasicBlockCount() - 1; block_id >= 0;
+  for (int block_id = code()->InstructionBlockCount() - 1; block_id >= 0;
        --block_id) {
     const InstructionBlock* block =
         code()->InstructionBlockAt(BasicBlock::RpoNumber::FromInt(block_id));
@@ -1354,7 +1358,7 @@ void RegisterAllocator::BuildLiveRanges() {
                operand_index);
         LiveRange* range = LiveRangeFor(operand_index);
         PrintF("  (first use is at %d)\n", range->first_pos()->pos().Value());
-        CompilationInfo* info = code()->linkage()->info();
+        CompilationInfo* info = this->info();
         if (info->IsStub()) {
           if (info->code_stub() == NULL) {
             PrintF("\n");
@@ -1944,11 +1948,19 @@ void RegisterAllocator::AllocateBlockedReg(LiveRange* current) {
 }
 
 
+static const InstructionBlock* GetContainingLoop(
+    const InstructionSequence* sequence, const InstructionBlock* block) {
+  BasicBlock::RpoNumber index = block->loop_header();
+  if (!index.IsValid()) return NULL;
+  return sequence->InstructionBlockAt(index);
+}
+
+
 LifetimePosition RegisterAllocator::FindOptimalSpillingPos(
     LiveRange* range, LifetimePosition pos) {
   const InstructionBlock* block = GetInstructionBlock(pos.InstructionStart());
   const InstructionBlock* loop_header =
-      block->IsLoopHeader() ? block : code()->GetContainingLoop(block);
+      block->IsLoopHeader() ? block : GetContainingLoop(code(), block);
 
   if (loop_header == NULL) return pos;
 
@@ -1969,7 +1981,7 @@ LifetimePosition RegisterAllocator::FindOptimalSpillingPos(
     }
 
     // Try hoisting out to an outer loop.
-    loop_header = code()->GetContainingLoop(loop_header);
+    loop_header = GetContainingLoop(code(), loop_header);
   }
 
   return pos;
@@ -2086,10 +2098,10 @@ LifetimePosition RegisterAllocator::FindOptimalSplitPos(LifetimePosition start,
   const InstructionBlock* block = end_block;
   // Find header of outermost loop.
   // TODO(titzer): fix redundancy below.
-  while (code()->GetContainingLoop(block) != NULL &&
-         code()->GetContainingLoop(block)->rpo_number().ToInt() >
+  while (GetContainingLoop(code(), block) != NULL &&
+         GetContainingLoop(code(), block)->rpo_number().ToInt() >
              start_block->rpo_number().ToInt()) {
-    block = code()->GetContainingLoop(block);
+    block = GetContainingLoop(code(), block);
   }
 
   // We did not find any suitable outer loop. Split at the latest possible
@@ -2153,7 +2165,7 @@ void RegisterAllocator::Spill(LiveRange* range) {
     if (op == NULL) {
       // Allocate a new operand referring to the spill slot.
       RegisterKind kind = range->Kind();
-      int index = code()->frame()->AllocateSpillSlot(kind == DOUBLE_REGISTERS);
+      int index = frame()->AllocateSpillSlot(kind == DOUBLE_REGISTERS);
       if (kind == DOUBLE_REGISTERS) {
         op = DoubleStackSlotOperand::Create(index, zone());
       } else {
@@ -2198,8 +2210,7 @@ void RegisterAllocator::SetLiveRangeAssignedRegister(LiveRange* range,
 
 RegisterAllocatorPhase::RegisterAllocatorPhase(const char* name,
                                                RegisterAllocator* allocator)
-    : CompilationPhase(name, allocator->code()->linkage()->info()),
-      allocator_(allocator) {
+    : CompilationPhase(name, allocator->info()), allocator_(allocator) {
   if (FLAG_turbo_stats) {
     allocator_zone_start_allocation_size_ =
         allocator->zone()->allocation_size();

diff --git a/src/compiler/register-allocator.h b/src/compiler/register-allocator.h
index 5498aba0e41a87af6335532901c35b4a2f8b0f05..adcc9043dadca1140aea97de742de49f8a72c328 100644 (file)
--- a/src/compiler/register-allocator.h
+++ b/src/compiler/register-allocator.h
@@ -317,7 +317,9 @@ class LiveRange : public ZoneObject {
 
 class RegisterAllocator BASE_EMBEDDED {
  public:
-  explicit RegisterAllocator(InstructionSequence* code);
+  // TODO(dcarney): remove info
+  explicit RegisterAllocator(Frame* frame, CompilationInfo* info,
+                             InstructionSequence* code);
 
   static void TraceAlloc(const char* msg, ...);
 
@@ -338,6 +340,7 @@ class RegisterAllocator BASE_EMBEDDED {
     return &fixed_double_live_ranges_;
   }
 
+  CompilationInfo* info() const { return info_; }
   inline InstructionSequence* code() const { return code_; }
 
   // This zone is for datastructures only needed during register allocation.
@@ -492,8 +495,12 @@ class RegisterAllocator BASE_EMBEDDED {
     return code()->InstructionAt(index);
   }
 
+  Frame* frame() const { return frame_; }
+
   Zone zone_;
-  InstructionSequence* code_;
+  Frame* const frame_;
+  CompilationInfo* const info_;
+  InstructionSequence* const code_;
 
   // During liveness analysis keep a mapping from block id to live_in sets
   // for blocks already analyzed.

diff --git a/src/compiler/x64/code-generator-x64.cc b/src/compiler/x64/code-generator-x64.cc
index 070c7bb33b571e7fc48733454b995ba384d19920..f8f0e5022912ac2dbfa7354afb33c6f30f1526e4 100644 (file)
--- a/src/compiler/x64/code-generator-x64.cc
+++ b/src/compiler/x64/code-generator-x64.cc
@@ -569,9 +569,8 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       __ movsxlq(index, index);
       __ movq(Operand(object, index, times_1, 0), value);
       __ leaq(index, Operand(object, index, times_1, 0));
-      SaveFPRegsMode mode = code_->frame()->DidAllocateDoubleRegisters()
-                                ? kSaveFPRegs
-                                : kDontSaveFPRegs;
+      SaveFPRegsMode mode =
+          frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
       __ RecordWrite(object, index, value, mode);
       break;
     }

diff --git a/test/cctest/compiler/test-codegen-deopt.cc b/test/cctest/compiler/test-codegen-deopt.cc
index d68298612918cbd46a01360fbe53f9132e95264e..3b5a7379eb8e09eb32de5d1aa4e8a1a9ab7c17d1 100644 (file)
--- a/test/cctest/compiler/test-codegen-deopt.cc
+++ b/test/cctest/compiler/test-codegen-deopt.cc
@@ -65,10 +65,10 @@ class DeoptCodegenTester {
 
     // Initialize the codegen and generate code.
     Linkage* linkage = new (scope_->main_zone()) Linkage(&info);
-    code = new v8::internal::compiler::InstructionSequence(
-        scope_->main_zone(), linkage, graph, schedule);
+    code = new v8::internal::compiler::InstructionSequence(scope_->main_zone(),
+                                                           graph, schedule);
     SourcePositionTable source_positions(graph);
-    InstructionSelector selector(code, schedule, &source_positions);
+    InstructionSelector selector(linkage, code, schedule, &source_positions);
     selector.SelectInstructions();
 
     if (FLAG_trace_turbo) {
@@ -76,7 +76,8 @@ class DeoptCodegenTester {
          << *code;
     }
 
-    RegisterAllocator allocator(code);
+    Frame frame;
+    RegisterAllocator allocator(&frame, &info, code);
     CHECK(allocator.Allocate());
 
     if (FLAG_trace_turbo) {
@@ -84,7 +85,7 @@ class DeoptCodegenTester {
          << *code;
     }
 
-    compiler::CodeGenerator generator(code);
+    compiler::CodeGenerator generator(&frame, linkage, code);
     result_code = generator.GenerateCode();
 
 #ifdef OBJECT_PRINT

diff --git a/test/cctest/compiler/test-instruction.cc b/test/cctest/compiler/test-instruction.cc
index cde475b35fd3bcff30484bf42462eedd193267cf..defd9b669ee6edd1b955608aa2753f5d255aa723 100644 (file)
--- a/test/cctest/compiler/test-instruction.cc
+++ b/test/cctest/compiler/test-instruction.cc
@@ -54,7 +54,7 @@ class InstructionTester : public HandleAndZoneScope {
       Scheduler::ComputeSpecialRPO(&schedule);
       DCHECK(schedule.rpo_order()->size() > 0);
     }
-    code = new TestInstrSeq(main_zone(), &linkage, &graph, &schedule);
+    code = new TestInstrSeq(main_zone(), &graph, &schedule);
   }
 
   Node* Int32Constant(int32_t val) {
@@ -130,7 +130,7 @@ TEST(InstructionBasic) {
   CHECK_EQ(R.graph.NodeCount(), R.code->node_count());
 
   BasicBlockVector* blocks = R.schedule.rpo_order();
-  CHECK_EQ(static_cast<int>(blocks->size()), R.code->BasicBlockCount());
+  CHECK_EQ(static_cast<int>(blocks->size()), R.code->InstructionBlockCount());
 
   int index = 0;
   for (BasicBlockVectorIter i = blocks->begin(); i != blocks->end();

diff --git a/test/unittests/compiler/instruction-selector-unittest.cc b/test/unittests/compiler/instruction-selector-unittest.cc
index b1288d1bf1209c16bd18058cdbde2e6d77fb1d49..c7239cee9eba6eab3ef1193427ca005e5b5474f7 100644 (file)
--- a/test/unittests/compiler/instruction-selector-unittest.cc
+++ b/test/unittests/compiler/instruction-selector-unittest.cc
@@ -38,10 +38,10 @@ InstructionSelectorTest::Stream InstructionSelectorTest::StreamBuilder::Build(
   int initial_node_count = graph()->NodeCount();
   CompilationInfo info(test_->isolate(), test_->zone());
   Linkage linkage(&info, call_descriptor());
-  InstructionSequence sequence(test_->zone(), &linkage, graph(), schedule);
+  InstructionSequence sequence(test_->zone(), graph(), schedule);
   SourcePositionTable source_position_table(graph());
-  InstructionSelector selector(&sequence, schedule, &source_position_table,
-                               features);
+  InstructionSelector selector(&linkage, &sequence, schedule,
+                               &source_position_table, features);
   selector.SelectInstructions();
   if (FLAG_trace_turbo) {
     OFStream out(stdout);
@@ -51,9 +51,9 @@ InstructionSelectorTest::Stream InstructionSelectorTest::StreamBuilder::Build(
   Stream s;
   // Map virtual registers.
   {
-    const int* node_map = sequence.GetNodeMapForTesting();
+    const NodeToVregMap& node_map = sequence.GetNodeMapForTesting();
     for (int i = 0; i < initial_node_count; ++i) {
-      if (node_map[i] >= 0) {
+      if (node_map[i] != InstructionSequence::kNodeUnmapped) {
         s.virtual_registers_.insert(std::make_pair(i, node_map[i]));
       }
     }