CPUFREQ: modify cpufreq driver.
authorHong Guo <hong.guo@amlogic.com>
Tue, 31 Jul 2018 06:45:00 +0000 (14:45 +0800)
committerHong Guo <hong.guo@amlogic.com>
Thu, 2 Aug 2018 05:37:29 +0000 (22:37 -0700)
PD#170037: modify cpufreq driver.

Change-Id: Ic07e887dda26447653c407d06b009755aacc0d41
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
MAINTAINERS
arch/arm64/boot/dts/amlogic/mesong12b.dtsi
arch/arm64/configs/meson64_defconfig
arch/arm64/configs/meson64_smarthome_defconfig
drivers/amlogic/cpufreq/Kconfig
drivers/amlogic/cpufreq/Makefile
drivers/amlogic/cpufreq/meson-cpufreq.c [moved from drivers/cpufreq/meson-cpufreq.c with 94% similarity]
drivers/cpufreq/Kconfig.arm
drivers/cpufreq/Makefile

index 58d56c5..3a2e6b6 100644 (file)
@@ -14375,7 +14375,7 @@ F: sound/soc/codecs/amlogic/ad82584f.h
 
 AMLOGIC CPUFREQS DRIVER
 M:     hong guo <hong.guo@amlogic.com>
-F:     drivers/cpufreq/meson-cpufreq.c
+F:     drivers/amlogic/cpufreq/meson-cpufreq.c
 F:     drivers/amlogic/clk/clk-cpu-fclk-composite.c
 
 AMLOGIC Irblaster driver
index 6c94719..ddda2a6 100644 (file)
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                              <&clkc CLKID_CPU_FCLK_P>,
+                              <&clkc CLKID_SYS1_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU2:cpu@100 {
                        cpu-supply = <&vddcpu1>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
-
                };
 
                CPU3:cpu@101 {
                        enable-method = "psci";
                        //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                        sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+                       clocks = <&clkc CLKID_CPUB_CLK>,
+                              <&clkc CLKID_CPUB_FCLK_P>,
+                              <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table1>;
+                       cpu-supply = <&vddcpu1>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU4:cpu@102 {
                        enable-method = "psci";
                        //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                        sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+                       clocks = <&clkc CLKID_CPUB_CLK>,
+                              <&clkc CLKID_CPUB_FCLK_P>,
+                              <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table1>;
+                       cpu-supply = <&vddcpu1>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU5:cpu@103 {
                        enable-method = "psci";
                        //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                        sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+                       clocks = <&clkc CLKID_CPUB_CLK>,
+                              <&clkc CLKID_CPUB_FCLK_P>,
+                              <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table1>;
+                       cpu-supply = <&vddcpu1>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                idle-states {
index 8aaa573..2827591 100644 (file)
@@ -65,7 +65,6 @@ CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
 CONFIG_ARM_SCPI_CPUFREQ=y
-CONFIG_AMLOGIC_MESON_CPUFREQ=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=y
@@ -210,6 +209,8 @@ CONFIG_MAC80211=y
 CONFIG_RFKILL=y
 CONFIG_AMLOGIC_DRIVER=y
 CONFIG_AMLOGIC_MODIFY=y
+CONFIG_AMLOGIC_CPUFREQ=y
+CONFIG_AMLOGIC_MESON_CPUFREQ=y
 CONFIG_AMLOGIC_INPUT_BOOST=y
 CONFIG_AMLOGIC_UART=y
 CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
index 4adbfee..51760ad 100644 (file)
@@ -190,6 +190,8 @@ CONFIG_MAC80211=y
 CONFIG_RFKILL=y
 CONFIG_AMLOGIC_DRIVER=y
 CONFIG_AMLOGIC_MODIFY=y
+CONFIG_AMLOGIC_CPUFREQ=y
+CONFIG_AMLOGIC_MESON_CPUFREQ=y
 CONFIG_AMLOGIC_UART=y
 CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
 CONFIG_AMLOGIC_IOMAP=y
index 0afc861..d15a0fc 100644 (file)
@@ -8,19 +8,24 @@ menuconfig AMLOGIC_CPUFREQ
                CPU DVFS driver support for Amlogic SOC chips;
                You can use this driver to change cpu frequency.
 
-choice
-       prompt "Meson CPU Freq driver select"
-       depends on AMLOGIC_CPUFREQ
-       default AMLOGIC_M8B_CPUFREQ
-
 config AMLOGIC_M8B_CPUFREQ
        bool "Meson CPU Frequency scaling support for m8/m8b"
        depends on MACH_MESON8B && AMLOGIC_CPUFREQ
+       default n
        help
                cpufreq driver support for m8/m8b, select
                it if your chip belongs this group
 
-endchoice #AMLOGIC_CPUFREQ
+config AMLOGIC_MESON_CPUFREQ
+       bool  "MESON based CPUfreq driver"
+       depends on AMLOGIC_CPUFREQ
+       default n
+        help
+          This adds the CPUfreq driver support for ARM big.LITTLE platforms
+          using MESON dt for CPU power management.
+
+          This driver uses meson cpufreq driver to interact with the
+          firmware providing the CPU DVFS functionality.
 
 config AMLOGIC_INPUT_BOOST
     bool "Meson BOOST cpufreq when key input"
index b12229f..aa7be6f 100644 (file)
@@ -1 +1,2 @@
 obj-$(CONFIG_AMLOGIC_M8B_CPUFREQ)      += m8b_cpufreq.o
+obj-$(CONFIG_AMLOGIC_MESON_CPUFREQ)     += meson-cpufreq.o
similarity index 94%
rename from drivers/cpufreq/meson-cpufreq.c
rename to drivers/amlogic/cpufreq/meson-cpufreq.c
index bf10066..ff09c68 100644 (file)
@@ -1,20 +1,18 @@
 /*
- * Generic big.LITTLE CPUFreq Interface driver
+ * drivers/amlogic/cpufreq/meson-cpufreq.c
  *
- * It provides necessary ops to arm_big_little cpufreq driver and gets
- * Frequency information from Device Tree. Freq table in DT must be in KHz.
- *
- * Copyright (C) 2013 Linaro.
- * Viresh Kumar <viresh.kumar@linaro.org>
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
  *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
  */
 
 //#define DEBUG  0
@@ -40,9 +38,8 @@
 #include <linux/delay.h>
 #include <linux/regulator/driver.h>
 
-#include "arm_big_little.h"
-#include "../regulator/internal.h"
-
+#include "../../regulator/internal.h"
+#include "../../base/power/opp/opp.h"
 /* Currently we support only two clusters */
 #define MAX_CLUSTERS   2
 
@@ -56,7 +53,7 @@
 
 static struct thermal_cooling_device *cdev[MAX_CLUSTERS];
 static struct clk *clk[MAX_CLUSTERS];
-static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS + 1];
+static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS];
 
 /* Default voltage_tolerance */
 #define DEF_VOLT_TOL           0
@@ -426,7 +423,7 @@ static int meson_cpufreq_init(struct cpufreq_policy *policy)
                        per_cpu(physical_cluster, cpu) = cur_cluster;
        }
 
-       ret = dev_pm_opp_of_add_table(cpu_dev);
+       ret = dev_pm_opp_of_cpumask_add_table(policy->cpus);
        if (ret) {
                pr_err("%s: init_opp_table failed, cpu: %d, cluster: %d, err: %d\n",
                                __func__, cpu_dev->id, cur_cluster, ret);
@@ -458,7 +455,7 @@ static int meson_cpufreq_init(struct cpufreq_policy *policy)
        policy->driver_data = cpufreq_data;
        policy->clk = clk[cur_cluster];
        policy->cpuinfo.transition_latency = transition_latency;
-       policy->suspend_freq = get_table_max(freq_table[0]);
+       policy->suspend_freq = get_table_max(freq_table[cur_cluster]);
        policy->cur = clk_get_rate(clk[cur_cluster]) / 1000;
 
        /*
@@ -628,5 +625,5 @@ static struct platform_driver meson_cpufreq_platdrv = {
 module_platform_driver(meson_cpufreq_platdrv);
 
 MODULE_AUTHOR("Amlogic cpufreq driver owner");
-MODULE_DESCRIPTION("Generic ARM big LITTLE cpufreq driver via DT");
+MODULE_DESCRIPTION("Generic ARM big LITTLE cpufreq driver via DTS");
 MODULE_LICENSE("GPL v2");
index f393d97..7de66df 100644 (file)
@@ -203,16 +203,6 @@ config ARM_SCPI_CPUFREQ
          This driver uses SCPI Message Protocol driver to interact with the
          firmware providing the CPU DVFS functionality.
 
-config AMLOGIC_MESON_CPUFREQ
-        tristate "MESON based CPUfreq driver"
-        depends on ARM_BIG_LITTLE_CPUFREQ
-        help
-          This adds the CPUfreq driver support for ARM big.LITTLE platforms
-          using MESON dt for CPU power management.
-
-          This driver uses meson cpufreq driver to interact with the
-          firmware providing the CPU DVFS functionality.
-
 config ARM_SPEAR_CPUFREQ
        bool "SPEAr CPUFreq support"
        depends on PLAT_SPEAR
index 3f9545e..f10a18d 100644 (file)
@@ -77,7 +77,6 @@ obj-$(CONFIG_ARM_S5PV210_CPUFREQ)     += s5pv210-cpufreq.o
 obj-$(CONFIG_ARM_SA1100_CPUFREQ)       += sa1100-cpufreq.o
 obj-$(CONFIG_ARM_SA1110_CPUFREQ)       += sa1110-cpufreq.o
 obj-$(CONFIG_ARM_SCPI_CPUFREQ)         += scpi-cpufreq.o
-obj-$(CONFIG_AMLOGIC_MESON_CPUFREQ)    += meson-cpufreq.o
 obj-$(CONFIG_ARM_SPEAR_CPUFREQ)                += spear-cpufreq.o
 obj-$(CONFIG_ARM_STI_CPUFREQ)          += sti-cpufreq.o
 obj-$(CONFIG_ARM_TEGRA20_CPUFREQ)      += tegra20-cpufreq.o