Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register...
authorSylvestre Ledru <sylvestre@debian.org>
Sat, 3 Aug 2019 13:51:58 +0000 (13:51 +0000)
committerSylvestre Ledru <sylvestre@debian.org>
Sat, 3 Aug 2019 13:51:58 +0000 (13:51 +0000)
llvm-svn: 367754

llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp

index c45b2d0e39c1a4f8771e75825ace2bbf4015a976..2776b031480eff2f400261faa197340a8c1f9267 100644 (file)
@@ -874,7 +874,7 @@ unsigned AVRExpandPseudo::scavengeGPR8(MachineInstr &MI) {
   // Exclude all the registers being used by the instruction.
   for (MachineOperand &MO : MI.operands()) {
     if (MO.isReg() && MO.getReg() != 0 && !MO.isDef() &&
-        !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
+        !Register::isVirtualRegister(MO.getReg()))
       Candidates.reset(MO.getReg());
   }
 
index 5cb4441c438007704a4a007715b7cf7c7c53b1c1..4c4f4faa05086253bf7c7b5eb75147714e007af7 100644 (file)
@@ -251,7 +251,7 @@ bool AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(const SDValue &Op,
       RegisterSDNode *RegNode =
           cast<RegisterSDNode>(CopyFromRegOp->getOperand(1));
       Reg = RegNode->getReg();
-      CanHandleRegImmOpt &= (TargetRegisterInfo::isVirtualRegister(Reg) ||
+      CanHandleRegImmOpt &= (Register::isVirtualRegister(Reg) ||
                              AVR::PTRDISPREGSRegClass.contains(Reg));
     } else {
       CanHandleRegImmOpt = false;