[GISel]: Fix trivial build breakage
authorAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 6 Aug 2019 17:53:04 +0000 (17:53 +0000)
committerAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 6 Aug 2019 17:53:04 +0000 (17:53 +0000)
llvm-svn: 368067

llvm/include/llvm/CodeGen/GlobalISel/GISelKnownBits.h
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
llvm/test/CodeGen/AArch64/O0-pipeline.ll

index d2d4595..d546c39 100644 (file)
@@ -66,7 +66,7 @@ public:
   void changedInstr(MachineInstr &MI) override{};
 
 protected:
-  constexpr unsigned getMaxDepth() const { return 6; }
+  unsigned getMaxDepth() const { return 6; }
 };
 
 /// To use KnownBitsInfo analysis in a pass,
index bf316cb..12e69f8 100644 (file)
@@ -260,7 +260,7 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
                          Depth + 1);
     if (!RHSKnown.isConstant()) {
       LLVM_DEBUG(
-          MachineInstr *RHSMI = MRI->getVRegDef(MI.getOperand(2).getReg());
+          MachineInstr *RHSMI = MRI.getVRegDef(MI.getOperand(2).getReg());
           dbgs() << '[' << Depth << "] Shift not known constant: " << *RHSMI);
       break;
     }
index e8f831f..38af181 100644 (file)
@@ -35,6 +35,7 @@
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Analysis containing CSE Info
 ; CHECK-NEXT:       IRTranslator
+; CHECK-NEXT:       Analysis for ComputingKnownBits
 ; CHECK-NEXT:       AArch64PreLegalizerCombiner
 ; CHECK-NEXT:       Analysis containing CSE Info
 ; CHECK-NEXT:       Legalizer