Note that SPU vertex transformation is disabled at this time.
cell_clear_surface(struct pipe_context *pipe, struct pipe_surface *ps,
unsigned clearValue)
{
+ struct pipe_screen *screen = pipe->screen;
struct cell_context *cell = cell_context(pipe);
uint surfIndex;
if (!cell->cbuf_map[0])
- cell->cbuf_map[0] = pipe_surface_map(ps);
+ cell->cbuf_map[0] = screen->surface_map(screen, ps,
+ PIPE_BUFFER_USAGE_GPU_WRITE);
if (ps == cell->framebuffer.zsbuf) {
surfIndex = 1;
{
struct draw_context *draw = draw_create();
+#if 0 /* broken */
if (getenv("GALLIUM_CELL_VS")) {
/* plug in SPU-based vertex transformation code */
draw->shader_queue_flush = cell_vertex_shader_queue_flush;
draw->driver_private = cell;
}
+#endif
return draw;
}
cell->pipe.draw_arrays = cell_draw_arrays;
cell->pipe.draw_elements = cell_draw_elements;
+ cell->pipe.draw_range_elements = cell_draw_range_elements;
+ cell->pipe.set_edgeflags = cell_set_edgeflags;
cell->pipe.clear = cell_clear_surface;
cell->pipe.flush = cell_flush;
}
draw_set_mapped_constant_buffer(sp->draw,
- sp->mapped_constants[PIPE_SHADER_VERTEX]);
+ sp->mapped_constants[PIPE_SHADER_VERTEX],
+ sp->constants[PIPE_SHADER_VERTEX].size);
}
static void
* XXX should the element buffer be specified/bound with a separate function?
*/
boolean
-cell_draw_elements(struct pipe_context *pipe,
- struct pipe_buffer *indexBuffer,
- unsigned indexSize,
- unsigned mode, unsigned start, unsigned count)
+cell_draw_range_elements(struct pipe_context *pipe,
+ struct pipe_buffer *indexBuffer,
+ unsigned indexSize,
+ unsigned min_index,
+ unsigned max_index,
+ unsigned mode, unsigned start, unsigned count)
{
struct cell_context *sp = cell_context(pipe);
struct draw_context *draw = sp->draw;
return TRUE;
}
+
+
+boolean
+cell_draw_elements(struct pipe_context *pipe,
+ struct pipe_buffer *indexBuffer,
+ unsigned indexSize,
+ unsigned mode, unsigned start, unsigned count)
+{
+ return cell_draw_range_elements( pipe, indexBuffer,
+ indexSize,
+ 0, 0xffffffff,
+ mode, start, count );
+}
+
+
+
+void
+cell_set_edgeflags(struct pipe_context *pipe, const unsigned *edgeflags)
+{
+ struct cell_context *cell = cell_context(pipe);
+ draw_set_edgeflags(cell->draw, edgeflags);
+}
#define CELL_DRAW_ARRAYS_H
-boolean cell_draw_arrays(struct pipe_context *pipe, unsigned mode,
- unsigned start, unsigned count);
+extern boolean
+cell_draw_arrays(struct pipe_context *pipe, unsigned mode,
+ unsigned start, unsigned count);
-boolean cell_draw_elements(struct pipe_context *pipe,
- struct pipe_buffer *indexBuffer,
- unsigned indexSize,
- unsigned mode, unsigned start, unsigned count);
+extern boolean
+cell_draw_elements(struct pipe_context *pipe,
+ struct pipe_buffer *indexBuffer,
+ unsigned indexSize,
+ unsigned mode, unsigned start, unsigned count);
+extern boolean
+cell_draw_range_elements(struct pipe_context *pipe,
+ struct pipe_buffer *indexBuffer,
+ unsigned indexSize,
+ unsigned min_index,
+ unsigned max_index,
+ unsigned mode, unsigned start, unsigned count);
+
+extern void
+cell_set_edgeflags(struct pipe_context *pipe, const unsigned *edgeflags);
#endif /* CELL_DRAW_ARRAYS_H */
struct pipe_surface *csurf = fb->cbufs[0];
struct pipe_surface *zsurf = fb->zsbuf;
uint i;
+ uint flags = (PIPE_BUFFER_USAGE_GPU_WRITE |
+ PIPE_BUFFER_USAGE_GPU_READ);
/* unmap old surfaces */
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
/* map new surfaces */
if (csurf)
- cell->cbuf_map[0] = pipe_surface_map(csurf);
+ cell->cbuf_map[0] = pipe_surface_map(csurf, flags);
if (zsurf)
- cell->zsbuf_map = pipe_surface_map(zsurf);
+ cell->zsbuf_map = pipe_surface_map(zsurf, flags);
cell->dirty |= CELL_NEW_FRAMEBUFFER;
}
const struct draw_context *const draw = cell->draw;
struct cell_shader_info info;
- info.num_outputs = draw->num_vs_outputs;
- info.declarations = (uintptr_t) draw->machine.Declarations;
- info.num_declarations = draw->machine.NumDeclarations;
- info.instructions = (uintptr_t) draw->machine.Instructions;
- info.num_instructions = draw->machine.NumInstructions;
- info.immediates = (uintptr_t) draw->machine.Imms;
- info.num_immediates = draw->machine.ImmLimit / 4;
+ info.num_outputs = draw_num_vs_outputs(draw);
+ info.declarations = (uintptr_t) draw->vs.machine.Declarations;
+ info.num_declarations = draw->vs.machine.NumDeclarations;
+ info.instructions = (uintptr_t) draw->vs.machine.Instructions;
+ info.num_instructions = draw->vs.machine.NumInstructions;
+ info.immediates = (uintptr_t) draw->vs.machine.Imms;
+ info.num_immediates = draw->vs.machine.ImmLimit / 4;
emit_state_cmd(cell, CELL_CMD_STATE_BIND_VS,
& info, sizeof(info));
static INLINE struct cell_fragment_shader_state *
cell_fragment_shader_state(void *shader)
{
- return (struct pipe_shader_state *) shader;
+ return (struct cell_fragment_shader_state *) shader;
}
static INLINE struct cell_vertex_shader_state *
cell_vertex_shader_state(void *shader)
{
- return (struct pipe_shader_state *) shader;
+ return (struct cell_vertex_shader_state *) shader;
}
**************************************************************************/
#include "pipe/p_defines.h"
-#include "util/u_memory.h"
#include "pipe/p_inlines.h"
#include "pipe/p_winsys.h"
-#include "util/p_tile.h"
+#include "util/u_memory.h"
#include "util/u_rect.h"
+#include "util/u_tile.h"
+
#include "cell_context.h"
#include "cell_surface.h"
{
assert( dst->cpp == src->cpp );
- pipe_copy_rect(pipe_surface_map(dst),
+ pipe_copy_rect(pipe_surface_map(dst, PIPE_BUFFER_USAGE_CPU_WRITE),
&dst->block,
dst->stride,
dstx, dsty,
width, height,
- pipe_surface_map(src),
+ pipe_surface_map(src, PIPE_BUFFER_USAGE_CPU_READ),
do_flip ? -src->stride : src->stride,
srcx, do_flip ? height - 1 - srcy : srcy);
unsigned width, unsigned height, unsigned value)
{
unsigned i, j;
- void *dst_map = pipe_surface_map(dst);
+ void *dst_map = pipe_surface_map(dst, PIPE_BUFFER_USAGE_CPU_WRITE);
assert(dst->stride > 0);
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
-#include "util/u_memory.h"
#include "pipe/p_winsys.h"
+#include "util/u_math.h"
+#include "util/u_memory.h"
#include "cell_context.h"
#include "cell_state.h"
pt->nblocksx[level] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[level] = pf_get_nblocksy(&pt->block, height);
+ spt->stride[level] = pt->nblocksx[level] * pt->block.size;
+
spt->level_offset[level] = spt->buffer_size;
spt->buffer_size += (pt->nblocksy[level] *
((pt->target == PIPE_TEXTURE_CUBE) ? 6 : depth) *
- pt->nblocksx[level] * pt->block.size;
+ pt->nblocksx[level] * pt->block.size);
width = minify(width);
height = minify(height);
static struct pipe_surface *
cell_get_tex_surface_screen(struct pipe_screen *screen,
struct pipe_texture *pt,
- unsigned face, unsigned level, unsigned zslice)
+ unsigned face, unsigned level, unsigned zslice,
+ unsigned usage)
{
struct pipe_winsys *ws = screen->winsys;
struct cell_texture *spt = cell_texture(pt);
ps->nblocksy = pt->nblocksy[level];
ps->stride = spt->stride[level];
ps->offset = spt->level_offset[level];
+ ps->usage = usage;
+
+ /* XXX may need to override usage flags (see sp_texture.c) */
+
if (pt->target == PIPE_TEXTURE_CUBE || pt->target == PIPE_TEXTURE_3D) {
ps->offset += ((pt->target == PIPE_TEXTURE_CUBE) ? face : zslice) *
assert(w % TILE_SIZE == 0);
assert(h % TILE_SIZE == 0);
- surf = screen->get_tex_surface(screen, &texture->base, face, level, zslice);
+ surf = screen->get_tex_surface(screen, &texture->base, face, level, zslice,
+ PIPE_BUFFER_USAGE_CPU_WRITE);
ASSERT(surf);
- src = (const uint *) pipe_surface_map(surf);
+ src = (const uint *) pipe_surface_map(surf, PIPE_BUFFER_USAGE_CPU_WRITE);
if (texture->tiled_data) {
align_free(texture->tiled_data);
}
-
void
cell_update_texture_mapping(struct cell_context *cell)
{
+#if 0
uint face = 0, level = 0, zslice = 0;
+#endif
uint i;
for (i = 0; i < CELL_MAX_SAMPLERS; i++) {
}
+static void *
+cell_surface_map( struct pipe_screen *screen,
+ struct pipe_surface *surface,
+ unsigned flags )
+{
+ ubyte *map;
+
+ if (flags & ~surface->usage) {
+ assert(0);
+ return NULL;
+ }
+
+ map = screen->winsys->buffer_map( screen->winsys, surface->buffer, flags );
+ if (map == NULL)
+ return NULL;
+
+ /* May want to different things here depending on read/write nature
+ * of the map:
+ */
+ if (surface->texture &&
+ (flags & PIPE_BUFFER_USAGE_CPU_WRITE))
+ {
+ /* Do something to notify sharing contexts of a texture change.
+ * In softpipe, that would mean flushing the texture cache.
+ */
+#if 0
+ cell_screen(screen)->timestamp++;
+#endif
+ }
+
+ return map + surface->offset;
+}
+
+
+static void
+cell_surface_unmap(struct pipe_screen *screen,
+ struct pipe_surface *surface)
+{
+ screen->winsys->buffer_unmap( screen->winsys, surface->buffer );
+}
+
+
void
cell_init_texture_functions(struct cell_context *cell)
{
- cell->pipe.texture_update = cell_texture_update;
+ /*cell->pipe.texture_update = cell_texture_update;*/
}
void
screen->texture_create = cell_texture_create_screen;
screen->texture_release = cell_texture_release_screen;
screen->get_tex_surface = cell_get_tex_surface_screen;
+
+ screen->surface_map = cell_surface_map;
+ screen->surface_unmap = cell_surface_unmap;
}
struct pipe_texture base;
unsigned long level_offset[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned long stride[PIPE_MAX_TEXTURE_LEVELS];
/* The data is held here:
*/
#include "cell_spu.h"
#include "cell_vbuf.h"
#include "draw/draw_vbuf.h"
+#include "util/u_memory.h"
/** Allow vertex data to be inlined after RENDER command */
void cell_update_vertex_fetch(struct draw_context *draw)
{
+#if 0
struct cell_context *const cell =
(struct cell_context *) draw->driver_private;
struct spe_function *p = &cell->attrib_fetch;
cell->attrib_fetch_offsets[function_index[i]];
}
}
+#else
+ assert(0);
+#endif
}
#include "pipe/p_defines.h"
#include "pipe/p_context.h"
#include "pipe/p_winsys.h"
+#include "util/u_math.h"
#include "cell_context.h"
#include "cell_draw_arrays.h"
void
cell_vertex_shader_queue_flush(struct draw_context *draw)
{
+#if 0
struct cell_context *const cell =
(struct cell_context *) draw->driver_private;
struct cell_command_vs *const vs = &cell_global.command[0].vs;
draw->vs.post_nr = draw->vs.queue_nr;
draw->vs.queue_nr = 0;
+#else
+ assert(0);
+#endif
}
* 1 address
*/
struct spu_exec_vector Temps[TGSI_EXEC_NUM_TEMPS
- + TGSI_EXEC_NUM_ADDRS + 1]
+ + TGSI_EXEC_NUM_TEMP_EXTRAS + 1]
ALIGN16_ATTRIB;
struct spu_exec_vector *Addrs;
#include "spu_tri.h"
#include "spu_tile.h"
#include "cell/common.h"
-
+#include "util/u_memory.h"
/**
#include <transpose_matrix4x4.h>
#include "pipe/p_compiler.h"
#include "pipe/p_format.h"
+#include "util/u_math.h"
#include "spu_colorpack.h"
#include "spu_main.h"
#include "spu_texture.h"
+
#include "pipe/p_shader_tokens.h"
+#include "pipe/p_debug.h"
#include "tgsi/tgsi_parse.h"
//#include "tgsi_build.h"
#include "tgsi/tgsi_util.h"
#include "pipe/p_state.h"
#include "pipe/p_shader_tokens.h"
-#include "spu_vertex_shader.h"
-#include "spu_exec.h"
+#include "util/u_math.h"
#include "draw/draw_private.h"
#include "draw/draw_context.h"
#include "cell/common.h"
+#include "spu_vertex_shader.h"
+#include "spu_exec.h"
#include "spu_main.h"
+
+#define MAX_VERTEX_SIZE ((2 + PIPE_MAX_SHADER_OUTPUTS) * 4 * sizeof(float))
+
+
+#define CLIP_RIGHT_BIT 0x01
+#define CLIP_LEFT_BIT 0x02
+#define CLIP_TOP_BIT 0x04
+#define CLIP_BOTTOM_BIT 0x08
+#define CLIP_FAR_BIT 0x10
+#define CLIP_NEAR_BIT 0x20
+
+
+static INLINE float
+dot4(const float *a, const float *b)
+{
+ return (a[0]*b[0] +
+ a[1]*b[1] +
+ a[2]*b[2] +
+ a[3]*b[3]);
+}
+
static INLINE unsigned
compute_clipmask(const float *clip, /*const*/ float plane[][4], unsigned nr)
{
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