This has not been migrated to DM_VIDEO since 2019. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
at91_periph_clk_enable(ATMEL_ID_HSMCI0);
}
-
-#ifdef CONFIG_LCD
-void at91_lcd_hw_init(void)
-{
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDPWR */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDVSYNC */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDHSYNC */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDDOTCK */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDDOTCK */
-
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */
- at91_pio3_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */
-
- at91_periph_clk_enable(ATMEL_ID_LCDC);
-}
-#endif
}
#endif
-#ifdef CONFIG_LCD
-void at91_lcd_hw_init(void)
-{
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */
-
- /* The lower 16-bit of LCD only available on Port A */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 0, 0); /* LCDD0 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 1, 0); /* LCDD1 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 8, 0); /* LCDD8 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 0); /* LCDD9 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */
- at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */
-
- /* Enable clock */
- at91_periph_clk_enable(ATMEL_ID_LCDC);
-}
-#endif
-
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
void at91_udp_hw_init(void)
{
#include <asm/arch/at91_rstc.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
-#include <lcd.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
#include <net.h>
}
#endif
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 240,
- .vl_row = 320,
- .vl_clk = 4965000,
- .vl_sync = ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- .vl_bpix = 3,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 1,
- .vl_right_margin = 33,
- .vl_vsync_len = 1,
- .vl_upper_margin = 1,
- .vl_lower_margin = 0,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
-}
-
-static void at91sam9261ek_lcd_hw_init(void)
-{
- at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
- at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
- at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
- at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
- at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
- at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
- at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
- at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
- at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
- at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
- at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
- at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
- at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
- at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
- at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
- at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
- at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
- at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
- at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
- at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
-
- at91_system_clk_enable(AT91_PMC_HCK1);
-
- /* For 9G10EK, let U-Boot allocate the framebuffer in SDRAM */
-#ifdef CONFIG_AT91SAM9261EK
- gd->fb_base = ATMEL_BASE_SRAM;
-#endif
-}
-
-#endif
-
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
#ifdef CONFIG_DRIVER_DM9000
at91sam9261ek_dm9000_hw_init();
#endif
-#ifdef CONFIG_LCD
- at91sam9261ek_lcd_hw_init();
-#endif
return 0;
}
#include <asm/io.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
-#include <lcd.h>
#include <atmel_lcdc.h>
#include <asm/mach-types.h>
}
#endif
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 240,
- .vl_row = 320,
- .vl_clk = 4965000,
- .vl_sync = ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- .vl_bpix = 3,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 1,
- .vl_right_margin = 33,
- .vl_vsync_len = 1,
- .vl_upper_margin = 1,
- .vl_lower_margin = 0,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power down */
-}
-
-static void at91sam9263ek_lcd_hw_init(void)
-{
- at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
- at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
- at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
- at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
- at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
- at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
- at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
- at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
- at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
- at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
- at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
- at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
- at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
- at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
- at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
- at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
- at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
- at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
- at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
- at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
- at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
-
- at91_periph_clk_enable(ATMEL_ID_LCDC);
- gd->fb_base = ATMEL_BASE_SRAM0;
-}
-
-#endif
-
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
#ifdef CONFIG_USB_OHCI_NEW
at91_uhp_hw_init();
#endif
-#ifdef CONFIG_LCD
- at91sam9263ek_lcd_hw_init();
-#endif
return 0;
}
#include <asm/arch/at91_common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
-#include <lcd.h>
#include <linux/mtd/rawnand.h>
#include <atmel_lcdc.h>
#include <asm/mach-types.h>
}
#endif
-#ifdef CONFIG_LCD
-
-vidinfo_t panel_info = {
- .vl_col = 480,
- .vl_row = 272,
- .vl_clk = 9000000,
- .vl_sync = ATMEL_LCDC_INVLINE_NORMAL |
- ATMEL_LCDC_INVFRAME_NORMAL,
- .vl_bpix = 3,
- .vl_tft = 1,
- .vl_hsync_len = 45,
- .vl_left_margin = 1,
- .vl_right_margin = 1,
- .vl_vsync_len = 1,
- .vl_upper_margin = 40,
- .vl_lower_margin = 1,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-
-void lcd_enable(void)
-{
- at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
-}
-
-static void at91sam9m10g45ek_lcd_hw_init(void)
-{
- at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
- at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
- at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
- at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
-
- at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
- at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
- at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
- at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
- at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
- at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
- at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
- at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
- at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
- at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
- at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
- at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
- at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
- at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
- at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
- at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
- at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
- at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
- at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
- at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
- at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
- at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
- at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
-
- at91_periph_clk_enable(ATMEL_ID_LCDC);
-
- /* board specific(not enough SRAM) */
- gd->fb_base = 0x73E00000;
-}
-
-#endif
-
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
#ifdef CONFIG_CMD_USB
at91sam9m10g45ek_usb_hw_init();
#endif
-#ifdef CONFIG_LCD
- at91sam9m10g45ek_lcd_hw_init();
-#endif
return 0;
}
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
#include <debug_uart.h>
-#include <lcd.h>
#include <atmel_hlcdc.h>
#include <netdev.h>
}
#endif
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 480,
- .vl_row = 272,
- .vl_clk = 9000000,
- .vl_bpix = LCD_BPP,
- .vl_sync = 0,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 8,
- .vl_right_margin = 43,
- .vl_vsync_len = 10,
- .vl_upper_margin = 4,
- .vl_lower_margin = 12,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 1); /* power down */
-}
-
-#endif /* CONFIG_LCD */
-
#ifdef CONFIG_USB_ATMEL
void at91sam9n12ek_usb_hw_init(void)
{
at91sam9n12ek_nand_hw_init();
#endif
-#ifdef CONFIG_LCD
- at91_lcd_hw_init();
-#endif
-
#ifdef CONFIG_USB_ATMEL
at91sam9n12ek_usb_hw_init();
#endif
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
-#include <lcd.h>
#include <atmel_lcdc.h>
DECLARE_GLOBAL_DATA_PTR;
}
#endif
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 240,
- .vl_row = 320,
- .vl_clk = 4965000,
- .vl_sync = ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- .vl_bpix = 3,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 1,
- .vl_right_margin = 33,
- .vl_vsync_len = 1,
- .vl_upper_margin = 1,
- .vl_lower_margin = 0,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
-}
-static void at91sam9rlek_lcd_hw_init(void)
-{
- at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */
- at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
- at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */
- at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */
- at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
- at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
- at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
- at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
- at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
- at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
- at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
- at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
- at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
- at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
- at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
- at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
- at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
- at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
- at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
-
- at91_periph_clk_enable(ATMEL_ID_LCDC);
-}
-
-#endif
-
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
#ifdef CONFIG_CMD_NAND
at91sam9rlek_nand_hw_init();
#endif
-#ifdef CONFIG_LCD
- at91sam9rlek_lcd_hw_init();
-#endif
return 0;
}
#include <dm.h>
#include <env.h>
#include <init.h>
-#include <lcd.h>
#include <net.h>
#ifndef CONFIG_DM_ETH
#include <netdev.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
-#include <lcd.h>
#include <video.h>
#include <wait_bit.h>
#include <atmel_hlcdc.h>
#include <asm/io.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
-#include <lcd.h>
#include <bmp_layout.h>
#include <atmel_lcdc.h>
#include <linux/delay.h>
*/
#define ATMEL_PMC_UHP (1 << 6)
-/* board specific (not enough SRAM) */
-#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
-
/* NOR flash */
#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_FLASH_BASE 0x10000000
CONFIG_RTC_MCFRRTC
CONFIG_RTC_MXS
CONFIG_RTC_PT7C4338
-CONFIG_SAMA5D3_LCD_BASE
CONFIG_SANDBOX_ARCH
CONFIG_SANDBOX_SDL
CONFIG_SANDBOX_SPI_MAX_BUS
projects / platform / kernel / u-boot.git / commitdiff