IIC0_EWrite(S2MPS14_WR_ADDR, RTC_BUF, 0x17);
IIC0_EWrite(S2MPS14_WR_ADDR, BUCK2_OUT,
WR_BUCK_VOLT(CONFIG_ARM_VOLT) + VDD_BASE_OFFSET);
+
+}
+
+void pmic_enable_wtsr()
+{
+ unsigned char buf = 0;
+ IIC0_ESetport();
+
+ IIC0_ERead(S2MPS14_RTC_RD_ADDR, RTC_WTSR_SMPL, &buf);
+ buf |= WTSREN;
+ buf |= WTSRT;
+ IIC0_EWrite(S2MPS14_RTC_WR_ADDR, RTC_WTSR_SMPL, buf);
}
void pmic_enable_peric_dev(void)
#define S2MPS14_WR_ADDR 0xCC
#define S2MPS14_RD_ADDR 0xCD
+/* RTC */
+#define S2MPS14_RTC_WR_ADDR 0x0C
+#define S2MPS14_RTC_RD_ADDR 0x0D
+
#define VDD_BASE_VOLT_BUCK1 65000
#define VDD_VOLT_STEP_BUCK1 625
#define MIN_VOLT_BUCK1 650
*/
#define WRSTBI_EN (0x1 << 5)
+/*
+ * RTC WTSR/SMPL
+ */
+#define RTC_WTSR_SMPL (0x1)
+#define WTSREN (0x1 << 6)
+#define WTSRT (0x3)
+
extern void pmic_init(void);
+extern void pmic_enable_wtsr(void);
extern void IIC0_ERead(unsigned char ChipId,
unsigned char IicAddr, unsigned char *IicData);
extern void IIC0_EWrite(unsigned char ChipId,