mtd: spi-nor-core: Enable octal DTR mode when possible

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index b9d3101..cdb4648 100644 (file)
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2888,10 +2888,41 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
        return nor->setup(nor, info, params);
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor)
+{
+       int ret;
+
+       if (!nor->octal_dtr_enable)
+               return 0;
+
+       if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+             nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+               return 0;
+
+       ret = nor->octal_dtr_enable(nor);
+       if (ret)
+               return ret;
+
+       nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+
+       return 0;
+}
+
 static int spi_nor_init(struct spi_nor *nor)
 {
        int err;
 
+       err = spi_nor_octal_dtr_enable(nor);
+       if (err) {
+               dev_dbg(nor->dev, "Octal DTR mode not supported\n");
+               return err;
+       }
+
        /*
         * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
         * with the software protection bits set

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 295583e..aae814f 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -477,6 +477,7 @@ struct spi_flash {
  * @flash_is_locked:   [FLASH-SPECIFIC] check if a region of the SPI NOR is
  *                     completely locked
  * @quad_enable:       [FLASH-SPECIFIC] enables SPI NOR quad mode
+ * @octal_dtr_enable:  [FLASH-SPECIFIC] enables SPI NOR octal DTR mode.
  * @priv:              the private data
  */
 struct spi_nor {
@@ -524,6 +525,7 @@ struct spi_nor {
        int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
        int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
        int (*quad_enable)(struct spi_nor *nor);
+       int (*octal_dtr_enable)(struct spi_nor *nor);
 
        void *priv;
 /* Compatibility for spi_flash, remove once sf layer is merged with mtd */